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[build] Use .balign directive instead of .align 

The semantics of the assembler's .align directive vary by CPU
architecture.  For the ARM builds, it specifies a power of two rather
than a number of bytes.  This currently leads to the .einfo entries
(which do not appear in the final binary) having an alignment of 256
bytes for the ARM builds.

Fix by switching to the GNU-specific directive .balign, which is
consistent across architectures

Signed-off-by: Michael Brown <mcb30@ipxe.org>
pull/259/head
Michael Brown 2021-02-12 23:22:54 +00:00
parent b539e9a7e9
commit c160fb2593
11 changed files with 18 additions and 18 deletions
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2
src/arch/x86/core/stack.S
View File

@ -13,7 +13,7 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL )
**************************************************************************** ****************************************************************************
*/ */
.section ".stack", "aw", @nobits .section ".stack", "aw", @nobits
.align 8 .balign 8
.globl _stack .globl _stack
_stack: _stack:
.space STACK_SIZE .space STACK_SIZE

2
src/arch/x86/core/stack16.S
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@ -7,7 +7,7 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL )
**************************************************************************** ****************************************************************************
*/ */
.section ".stack16", "aw", @nobits .section ".stack16", "aw", @nobits
.align 8 .balign 8
.globl _stack16 .globl _stack16
_stack16: _stack16:
.space 4096 .space 4096

2
src/arch/x86/interface/pcbios/e820mangler.S
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@ -67,7 +67,7 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL )
**************************************************************************** ****************************************************************************
*/ */
.section ".data16", "aw", @progbits .section ".data16", "aw", @progbits
.align 16 .balign 16
.globl hidemem_base .globl hidemem_base
.globl hidemem_umalloc .globl hidemem_umalloc
.globl hidemem_textdata .globl hidemem_textdata

4
src/arch/x86/interface/pxe/pxe_entry.S
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@ -34,7 +34,7 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL )
*/ */
.section ".text16.data", "aw", @progbits .section ".text16.data", "aw", @progbits
.globl ppxe .globl ppxe
.align 16 .balign 16
ppxe: ppxe:
.ascii "!PXE" /* Signature */ .ascii "!PXE" /* Signature */
.byte pxe_length /* StructLength */ .byte pxe_length /* StructLength */
@ -72,7 +72,7 @@ undiheader:
*/ */
.section ".text16.data", "aw", @progbits .section ".text16.data", "aw", @progbits
.globl pxenv .globl pxenv
.align 16 .balign 16
pxenv: pxenv:
.ascii "PXENV+" /* Signature */ .ascii "PXENV+" /* Signature */
.word 0x0201 /* Version */ .word 0x0201 /* Version */

2
src/arch/x86/prefix/exeprefix.S
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@ -110,7 +110,7 @@ overlay:
/* Overlay number */ /* Overlay number */
.word 0 .word 0
.align 16, 0 .balign 16, 0
.globl _exe_start .globl _exe_start
_exe_start: _exe_start:

2
src/arch/x86/prefix/mromprefix.S
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@ -492,7 +492,7 @@ mromheader:
.word 0 .word 0
.size mromheader, . - mromheader .size mromheader, . - mromheader
.align 4 .balign 4
mpciheader: mpciheader:
.ascii "PCIR" /* Signature */ .ascii "PCIR" /* Signature */
.word pci_vendor_id /* Vendor identification */ .word pci_vendor_id /* Vendor identification */

8
src/arch/x86/prefix/romprefix.S
View File

@ -88,7 +88,7 @@ checksum:
.previous .previous
.ifeqs BUSTYPE, "PCIR" .ifeqs BUSTYPE, "PCIR"
.align 4 .balign 4
pciheader: pciheader:
.ascii "PCIR" /* Signature */ .ascii "PCIR" /* Signature */
.word pci_vendor_id /* Vendor identification */ .word pci_vendor_id /* Vendor identification */
@ -136,7 +136,7 @@ pci_devlist_end:
* BIOSes will scan on 16-byte boundaries rather than using * BIOSes will scan on 16-byte boundaries rather than using
* the offset stored at 0x1a * the offset stored at 0x1a
*/ */
.align 16 .balign 16
pnpheader: pnpheader:
.ascii "$PnP" /* Signature */ .ascii "$PnP" /* Signature */
.byte 0x01 /* Structure revision */ .byte 0x01 /* Structure revision */
@ -184,7 +184,7 @@ prodstr_pci_id:
.globl undiheader .globl undiheader
.weak undiloader .weak undiloader
.align 4 .balign 4
undiheader: undiheader:
.ascii "UNDI" /* Signature */ .ascii "UNDI" /* Signature */
.byte undiheader_len /* Length of structure */ .byte undiheader_len /* Length of structure */
@ -199,7 +199,7 @@ undiheader:
.equ undiheader_len, . - undiheader .equ undiheader_len, . - undiheader
.size undiheader, . - undiheader .size undiheader, . - undiheader
.align 4 .balign 4
ipxeheader: ipxeheader:
.ascii "iPXE" /* Signature */ .ascii "iPXE" /* Signature */
.byte ipxeheader_len /* Length of structure */ .byte ipxeheader_len /* Length of structure */

2
src/arch/x86/prefix/unlzma.S
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@ -231,7 +231,7 @@ rep_len_dec: .space sizeof__lzma_len_dec
literal: .rept ( ( 1 << LZMA_LC ) * 0x300 ) literal: .rept ( ( 1 << LZMA_LC ) * 0x300 )
.word 0 .word 0
.endr .endr
.align 4 .balign 4
.equ sizeof__lzma_dec, . - lzma_dec .equ sizeof__lzma_dec, . - lzma_dec
.previous .previous

2
src/arch/x86/transitions/liba20.S
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@ -285,7 +285,7 @@ enable_a20:
ret ret
.section ".text16.early.data", "aw", @progbits .section ".text16.early.data", "aw", @progbits
.align 2 .balign 2
enable_a20_method: enable_a20_method:
.word 0 .word 0
.size enable_a20_method, . - enable_a20_method .size enable_a20_method, . - enable_a20_method

6
src/arch/x86/transitions/librm.S
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@ -99,7 +99,7 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL )
**************************************************************************** ****************************************************************************
*/ */
.section ".data16.gdt", "aw", @progbits .section ".data16.gdt", "aw", @progbits
.align 16 .balign 16
gdt: gdt:
gdtr: /* The first GDT entry is unused, the GDTR can fit here. */ gdtr: /* The first GDT entry is unused, the GDTR can fit here. */
gdt_limit: .word gdt_length - 1 gdt_limit: .word gdt_length - 1
@ -224,7 +224,7 @@ RC_TMP_END:
/* Shared temporary static buffer */ /* Shared temporary static buffer */
.section ".bss16.rm_tmpbuf", "aw", @nobits .section ".bss16.rm_tmpbuf", "aw", @nobits
.align 16 .balign 16
rm_tmpbuf: rm_tmpbuf:
.space VC_TMP_END .space VC_TMP_END
.size rm_tmpbuf, . - rm_tmpbuf .size rm_tmpbuf, . - rm_tmpbuf
@ -1470,7 +1470,7 @@ interrupt_wrapper:
**************************************************************************** ****************************************************************************
*/ */
.section ".pages", "aw", @nobits .section ".pages", "aw", @nobits
.align SIZEOF_PT .balign SIZEOF_PT
/* Page map level 4 entries (PML4Es) /* Page map level 4 entries (PML4Es)
* *

4
src/include/errno.h
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@ -259,7 +259,7 @@ static inline void eplatform_discard ( int dummy __unused, ... ) {}
*/ */
#define __einfo_error( einfo ) ( { \ #define __einfo_error( einfo ) ( { \
__asm__ ( ".section \".einfo\", \"\", " PROGBITS_OPS "\n\t" \ __asm__ ( ".section \".einfo\", \"\", " PROGBITS_OPS "\n\t" \
".align 8\n\t" \ ".balign 8\n\t" \
"\n1:\n\t" \ "\n1:\n\t" \
".long ( 4f - 1b )\n\t" \ ".long ( 4f - 1b )\n\t" \
".long %c0\n\t" \ ".long %c0\n\t" \
@ -268,7 +268,7 @@ static inline void eplatform_discard ( int dummy __unused, ... ) {}
".long %c1\n\t" \ ".long %c1\n\t" \
"\n2:\t.asciz \"" __einfo_desc ( einfo ) "\"\n\t" \ "\n2:\t.asciz \"" __einfo_desc ( einfo ) "\"\n\t" \
"\n3:\t.asciz \"" __FILE__ "\"\n\t" \ "\n3:\t.asciz \"" __FILE__ "\"\n\t" \
".align 8\n\t" \ ".balign 8\n\t" \
"\n4:\n\t" \ "\n4:\n\t" \
".previous\n\t" : : \ ".previous\n\t" : : \
"i" ( __einfo_errno ( einfo ) ), \ "i" ( __einfo_errno ( einfo ) ), \