mirror of https://github.com/ipxe/ipxe.git
[intel] Refill receive ring only after enabling receiver
On 82576 (and probably others), the datasheet states that "the tail register of the queue (RDT[n]) should not be bumped until the queue is enabled". There is some confusion over exactly what constitutes "enabled": the initialisation blurb says that we should "poll the RXDCTL register until the ENABLE bit is set", while the description for the RXDCTL register says that the ENABLE bit is set by default (for queue zero). Empirical evidence suggests that the ENABLE bit reads as set immediately after writing to RCTL.EN, and so polling is not necessary. Signed-off-by: Michael Brown <mcb30@ipxe.org>pull/598/head
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2c72ce04ae
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8391ff3ee0
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@ -491,9 +491,6 @@ static int intel_open ( struct net_device *netdev ) {
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if ( ( rc = intel_create_ring ( intel, &intel->rx ) ) != 0 )
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if ( ( rc = intel_create_ring ( intel, &intel->rx ) ) != 0 )
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goto err_create_rx;
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goto err_create_rx;
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/* Fill receive ring */
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intel_refill_rx ( intel );
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/* Program MAC address */
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/* Program MAC address */
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memset ( &mac, 0, sizeof ( mac ) );
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memset ( &mac, 0, sizeof ( mac ) );
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memcpy ( mac.raw, netdev->ll_addr, sizeof ( mac.raw ) );
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memcpy ( mac.raw, netdev->ll_addr, sizeof ( mac.raw ) );
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@ -515,6 +512,9 @@ static int intel_open ( struct net_device *netdev ) {
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INTEL_RCTL_BAM | INTEL_RCTL_BSIZE_2048 | INTEL_RCTL_SECRC );
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INTEL_RCTL_BAM | INTEL_RCTL_BSIZE_2048 | INTEL_RCTL_SECRC );
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writel ( rctl, intel->regs + INTEL_RCTL );
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writel ( rctl, intel->regs + INTEL_RCTL );
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/* Fill receive ring */
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intel_refill_rx ( intel );
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/* Update link state */
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/* Update link state */
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intel_check_link ( netdev );
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intel_check_link ( netdev );
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