mirror of https://github.com/ipxe/ipxe.git
[mii] Separate concepts of MII interface and MII device
We currently have no generic concept of a PHY address, since all existing implementations simply hardcode the PHY address within the MII access methods. A bit-bashing MII interface will need to be provided with an explicit PHY address in order to generate the correct waveform. Allow for this by separating out the concept of a MII device (i.e. a specific PHY address attached to a particular MII interface). Signed-off-by: Michael Brown <mcb30@ipxe.org>pull/72/merge
parent
285e3e5287
commit
6804a8c89b
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@ -37,10 +37,10 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
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/**
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/**
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* Restart autonegotiation
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* Restart autonegotiation
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*
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*
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* @v mii MII interface
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* @v mii MII device
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* @ret rc Return status code
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* @ret rc Return status code
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*/
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*/
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int mii_restart ( struct mii_interface *mii ) {
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int mii_restart ( struct mii_device *mii ) {
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int bmcr;
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int bmcr;
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int rc;
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int rc;
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@ -66,12 +66,12 @@ int mii_restart ( struct mii_interface *mii ) {
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}
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}
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/**
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/**
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* Reset MII interface
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* Reset MII device
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*
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*
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* @v mii MII interface
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* @v mii MII device
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* @ret rc Return status code
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* @ret rc Return status code
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*/
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*/
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int mii_reset ( struct mii_interface *mii ) {
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int mii_reset ( struct mii_device *mii ) {
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unsigned int i;
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unsigned int i;
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int bmcr;
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int bmcr;
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int rc;
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int rc;
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@ -119,11 +119,11 @@ int mii_reset ( struct mii_interface *mii ) {
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/**
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/**
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* Update link status via MII
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* Update link status via MII
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*
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*
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* @v mii MII interface
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* @v mii MII device
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* @v netdev Network device
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* @v netdev Network device
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* @ret rc Return status code
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* @ret rc Return status code
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*/
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*/
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int mii_check_link ( struct mii_interface *mii, struct net_device *netdev ) {
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int mii_check_link ( struct mii_device *mii, struct net_device *netdev ) {
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int bmsr;
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int bmsr;
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int link;
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int link;
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int rc;
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int rc;
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@ -242,12 +242,15 @@ static int realtek_init_eeprom ( struct net_device *netdev ) {
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/**
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/**
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* Read from MII register
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* Read from MII register
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*
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*
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* @v mii MII interface
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* @v mdio MII interface
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* @v phy PHY address
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* @v reg Register address
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* @v reg Register address
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* @ret value Data read, or negative error
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* @ret value Data read, or negative error
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*/
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*/
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static int realtek_mii_read ( struct mii_interface *mii, unsigned int reg ) {
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static int realtek_mii_read ( struct mii_interface *mdio,
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struct realtek_nic *rtl = container_of ( mii, struct realtek_nic, mii );
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unsigned int phy __unused, unsigned int reg ) {
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struct realtek_nic *rtl =
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container_of ( mdio, struct realtek_nic, mdio );
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unsigned int i;
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unsigned int i;
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uint32_t value;
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uint32_t value;
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@ -279,14 +282,17 @@ static int realtek_mii_read ( struct mii_interface *mii, unsigned int reg ) {
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/**
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/**
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* Write to MII register
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* Write to MII register
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*
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*
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* @v mii MII interface
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* @v mdio MII interface
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* @v phy PHY address
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* @v reg Register address
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* @v reg Register address
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* @v data Data to write
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* @v data Data to write
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* @ret rc Return status code
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* @ret rc Return status code
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*/
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*/
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static int realtek_mii_write ( struct mii_interface *mii, unsigned int reg,
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static int realtek_mii_write ( struct mii_interface *mdio,
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unsigned int data) {
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unsigned int phy __unused, unsigned int reg,
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struct realtek_nic *rtl = container_of ( mii, struct realtek_nic, mii );
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unsigned int data ) {
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struct realtek_nic *rtl =
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container_of ( mdio, struct realtek_nic, mdio );
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unsigned int i;
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unsigned int i;
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/* Fail if PHYAR register is not present */
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/* Fail if PHYAR register is not present */
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@ -1158,7 +1164,8 @@ static int realtek_probe ( struct pci_device *pci ) {
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}
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}
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/* Initialise and reset MII interface */
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/* Initialise and reset MII interface */
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mii_init ( &rtl->mii, &realtek_mii_operations );
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mdio_init ( &rtl->mdio, &realtek_mii_operations );
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mii_init ( &rtl->mii, &rtl->mdio, 0 );
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if ( ( rc = realtek_phy_reset ( rtl ) ) != 0 )
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if ( ( rc = realtek_phy_reset ( rtl ) ) != 0 )
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goto err_phy_reset;
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goto err_phy_reset;
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@ -283,7 +283,9 @@ struct realtek_nic {
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/** Non-volatile options */
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/** Non-volatile options */
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struct nvo_block nvo;
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struct nvo_block nvo;
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/** MII interface */
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/** MII interface */
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struct mii_interface mii;
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struct mii_interface mdio;
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/** MII device */
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struct mii_device mii;
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/** Legacy datapath mode */
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/** Legacy datapath mode */
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int legacy;
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int legacy;
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@ -49,12 +49,14 @@ FILE_LICENCE ( GPL2_OR_LATER );
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/**
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/**
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* Read from MII register
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* Read from MII register
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*
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*
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* @v mii MII interface
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* @v mdio MII interface
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* @v phy PHY address
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* @v reg Register address
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* @v reg Register address
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* @ret value Data read, or negative error
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* @ret value Data read, or negative error
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*/
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*/
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static int rhine_mii_read ( struct mii_interface *mii, unsigned int reg ) {
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static int rhine_mii_read ( struct mii_interface *mdio,
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struct rhine_nic *rhn = container_of ( mii, struct rhine_nic, mii );
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unsigned int phy __unused, unsigned int reg ) {
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struct rhine_nic *rhn = container_of ( mdio, struct rhine_nic, mdio );
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unsigned int timeout = RHINE_TIMEOUT_US;
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unsigned int timeout = RHINE_TIMEOUT_US;
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uint8_t cr;
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uint8_t cr;
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@ -80,14 +82,16 @@ static int rhine_mii_read ( struct mii_interface *mii, unsigned int reg ) {
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/**
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/**
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* Write to MII register
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* Write to MII register
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*
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*
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* @v mii MII interface
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* @v mdio MII interface
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* @v phy PHY address
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* @v reg Register address
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* @v reg Register address
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* @v data Data to write
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* @v data Data to write
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* @ret rc Return status code
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* @ret rc Return status code
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*/
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*/
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static int rhine_mii_write ( struct mii_interface *mii, unsigned int reg,
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static int rhine_mii_write ( struct mii_interface *mdio,
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unsigned int phy __unused, unsigned int reg,
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unsigned int data ) {
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unsigned int data ) {
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struct rhine_nic *rhn = container_of ( mii, struct rhine_nic, mii );
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struct rhine_nic *rhn = container_of ( mdio, struct rhine_nic, mdio );
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unsigned int timeout = RHINE_TIMEOUT_US;
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unsigned int timeout = RHINE_TIMEOUT_US;
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uint8_t cr;
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uint8_t cr;
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@ -719,7 +723,8 @@ static int rhine_probe ( struct pci_device *pci ) {
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netdev->hw_addr[i] = readb ( rhn->regs + RHINE_MAC + i );
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netdev->hw_addr[i] = readb ( rhn->regs + RHINE_MAC + i );
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/* Initialise and reset MII interface */
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/* Initialise and reset MII interface */
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mii_init ( &rhn->mii, &rhine_mii_operations );
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mdio_init ( &rhn->mdio, &rhine_mii_operations );
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mii_init ( &rhn->mii, &rhn->mdio, 0 );
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if ( ( rc = mii_reset ( &rhn->mii ) ) != 0 ) {
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if ( ( rc = mii_reset ( &rhn->mii ) ) != 0 ) {
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DBGC ( rhn, "RHINE %p could not reset MII: %s\n",
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DBGC ( rhn, "RHINE %p could not reset MII: %s\n",
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rhn, strerror ( rc ) );
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rhn, strerror ( rc ) );
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@ -237,7 +237,9 @@ struct rhine_nic {
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uint8_t cr1;
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uint8_t cr1;
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/** MII interface */
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/** MII interface */
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struct mii_interface mii;
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struct mii_interface mdio;
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/** MII device */
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struct mii_device mii;
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/** Transmit descriptor ring */
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/** Transmit descriptor ring */
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struct rhine_ring tx;
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struct rhine_ring tx;
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@ -481,13 +481,15 @@ static int smscusb_mii_wait ( struct smscusb_device *smscusb ) {
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/**
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/**
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* Read from MII register
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* Read from MII register
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*
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*
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* @v mii MII interface
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* @v mdio MII interface
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* @v phy PHY address
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* @v reg Register address
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* @v reg Register address
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* @ret value Data read, or negative error
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* @ret value Data read, or negative error
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*/
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*/
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static int smscusb_mii_read ( struct mii_interface *mii, unsigned int reg ) {
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static int smscusb_mii_read ( struct mii_interface *mdio,
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unsigned int phy __unused, unsigned int reg ) {
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struct smscusb_device *smscusb =
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struct smscusb_device *smscusb =
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container_of ( mii, struct smscusb_device, mii );
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container_of ( mdio, struct smscusb_device, mdio );
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unsigned int base = smscusb->mii_base;
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unsigned int base = smscusb->mii_base;
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uint32_t mii_access;
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uint32_t mii_access;
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uint32_t mii_data;
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uint32_t mii_data;
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/**
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/**
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* Write to MII register
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* Write to MII register
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*
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*
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* @v mii MII interface
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* @v mdio MII interface
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* @v phy PHY address
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* @v reg Register address
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* @v reg Register address
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* @v data Data to write
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* @v data Data to write
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* @ret rc Return status code
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* @ret rc Return status code
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*/
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*/
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static int smscusb_mii_write ( struct mii_interface *mii, unsigned int reg,
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static int smscusb_mii_write ( struct mii_interface *mdio,
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unsigned int phy __unused, unsigned int reg,
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unsigned int data ) {
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unsigned int data ) {
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struct smscusb_device *smscusb =
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struct smscusb_device *smscusb =
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container_of ( mii, struct smscusb_device, mii );
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container_of ( mdio, struct smscusb_device, mdio );
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unsigned int base = smscusb->mii_base;
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unsigned int base = smscusb->mii_base;
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uint32_t mii_access;
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uint32_t mii_access;
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uint32_t mii_data;
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uint32_t mii_data;
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/** USB network device */
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/** USB network device */
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struct usbnet_device usbnet;
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struct usbnet_device usbnet;
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/** MII interface */
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/** MII interface */
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struct mii_interface mii;
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struct mii_interface mdio;
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/** MII device */
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struct mii_device mii;
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/** MII register base */
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/** MII register base */
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uint16_t mii_base;
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uint16_t mii_base;
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/** PHY interrupt source register */
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/** PHY interrupt source register */
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@ -275,7 +277,8 @@ static inline __attribute__ (( always_inline )) void
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smscusb_mii_init ( struct smscusb_device *smscusb, unsigned int mii_base,
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smscusb_mii_init ( struct smscusb_device *smscusb, unsigned int mii_base,
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unsigned int phy_source ) {
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unsigned int phy_source ) {
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mii_init ( &smscusb->mii, &smscusb_mii_operations );
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mdio_init ( &smscusb->mdio, &smscusb_mii_operations );
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mii_init ( &smscusb->mii, &smscusb->mdio, 0 );
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smscusb->mii_base = mii_base;
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smscusb->mii_base = mii_base;
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smscusb->phy_source = phy_source;
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smscusb->phy_source = phy_source;
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}
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}
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@ -100,13 +100,15 @@ static int velocity_autopoll_start ( struct velocity_nic *vlc ) {
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/**
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/**
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* Read from MII register
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* Read from MII register
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*
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*
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* @v mii MII interface
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* @v mdio MII interface
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* @v phy PHY address
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* @v reg Register address
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* @v reg Register address
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* @ret value Data read, or negative error
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* @ret value Data read, or negative error
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*/
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*/
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static int velocity_mii_read ( struct mii_interface *mii, unsigned int reg ) {
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static int velocity_mii_read ( struct mii_interface *mdio,
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unsigned int phy __unused, unsigned int reg ) {
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struct velocity_nic *vlc =
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struct velocity_nic *vlc =
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container_of ( mii, struct velocity_nic, mii );
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container_of ( mdio, struct velocity_nic, mdio );
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int timeout = VELOCITY_TIMEOUT_US;
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int timeout = VELOCITY_TIMEOUT_US;
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int result;
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int result;
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/**
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/**
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* Write to MII register
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* Write to MII register
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*
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*
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* @v mii MII interface
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* @v mdio MII interface
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* @v phy PHY address
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* @v reg Register address
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* @v reg Register address
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* @v data Data to write
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* @v data Data to write
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* @ret rc Return status code
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* @ret rc Return status code
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*/
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*/
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static int velocity_mii_write ( struct mii_interface *mii, unsigned int reg,
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static int velocity_mii_write ( struct mii_interface *mdio,
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unsigned int phy __unused, unsigned int reg,
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unsigned int data) {
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unsigned int data) {
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struct velocity_nic *vlc =
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struct velocity_nic *vlc =
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container_of ( mii, struct velocity_nic, mii );
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container_of ( mdio, struct velocity_nic, mdio );
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int timeout = VELOCITY_TIMEOUT_US;
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int timeout = VELOCITY_TIMEOUT_US;
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DBGC2 ( vlc, "VELOCITY %p MII write reg %d data 0x%04x\n",
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DBGC2 ( vlc, "VELOCITY %p MII write reg %d data 0x%04x\n",
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netdev->hw_addr[5] = readb ( vlc->regs + VELOCITY_MAC5 );
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netdev->hw_addr[5] = readb ( vlc->regs + VELOCITY_MAC5 );
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/* Initialise and reset MII interface */
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/* Initialise and reset MII interface */
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mii_init ( &vlc->mii, &velocity_mii_operations );
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mdio_init ( &vlc->mdio, &velocity_mii_operations );
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mii_init ( &vlc->mii, &vlc->mdio, 0 );
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if ( ( rc = mii_reset ( &vlc->mii ) ) != 0 ) {
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if ( ( rc = mii_reset ( &vlc->mii ) ) != 0 ) {
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DBGC ( vlc, "VELOCITY %p could not reset MII: %s\n",
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DBGC ( vlc, "VELOCITY %p could not reset MII: %s\n",
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vlc, strerror ( rc ) );
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vlc, strerror ( rc ) );
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/** Registers */
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/** Registers */
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void *regs;
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void *regs;
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/** MII interface */
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/** MII interface */
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struct mii_interface mii;
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struct mii_interface mdio;
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/** MII device */
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struct mii_device mii;
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/** Netdev */
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/** Netdev */
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struct net_device *netdev;
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struct net_device *netdev;
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@ -19,21 +19,24 @@ struct mii_operations {
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/**
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/**
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* Read from MII register
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* Read from MII register
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*
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*
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* @v mii MII interface
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* @v mdio MII interface
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* @v phy PHY address
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* @v reg Register address
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* @v reg Register address
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* @ret data Data read, or negative error
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* @ret data Data read, or negative error
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*/
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*/
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int ( * read ) ( struct mii_interface *mii, unsigned int reg );
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int ( * read ) ( struct mii_interface *mdio, unsigned int phy,
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unsigned int reg );
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/**
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/**
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* Write to MII register
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* Write to MII register
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*
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*
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* @v mii MII interface
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* @v mdio MII interface
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* @v phy PHY address
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* @v reg Register address
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* @v reg Register address
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* @v data Data to write
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* @v data Data to write
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* @ret rc Return status code
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* @ret rc Return status code
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*/
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*/
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int ( * write ) ( struct mii_interface *mii, unsigned int reg,
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int ( * write ) ( struct mii_interface *mdio, unsigned int phy,
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unsigned int data );
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unsigned int reg, unsigned int data );
|
||||||
};
|
};
|
||||||
|
|
||||||
/** An MII interface */
|
/** An MII interface */
|
||||||
|
@ -42,49 +45,75 @@ struct mii_interface {
|
||||||
struct mii_operations *op;
|
struct mii_operations *op;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
/** An MII device */
|
||||||
|
struct mii_device {
|
||||||
|
/** MII interface */
|
||||||
|
struct mii_interface *mdio;
|
||||||
|
/** PHY address */
|
||||||
|
unsigned int address;
|
||||||
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Initialise MII interface
|
* Initialise MII interface
|
||||||
*
|
*
|
||||||
* @v mii MII interface
|
* @v mdio MII interface
|
||||||
* @v op MII interface operations
|
* @v op MII interface operations
|
||||||
*/
|
*/
|
||||||
static inline __attribute__ (( always_inline )) void
|
static inline __attribute__ (( always_inline )) void
|
||||||
mii_init ( struct mii_interface *mii, struct mii_operations *op ) {
|
mdio_init ( struct mii_interface *mdio, struct mii_operations *op ) {
|
||||||
mii->op = op;
|
mdio->op = op;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Initialise MII device
|
||||||
|
*
|
||||||
|
* @v mii MII device
|
||||||
|
* @v mii MII interface
|
||||||
|
* @v address PHY address
|
||||||
|
*/
|
||||||
|
static inline __attribute__ (( always_inline )) void
|
||||||
|
mii_init ( struct mii_device *mii, struct mii_interface *mdio,
|
||||||
|
unsigned int address ) {
|
||||||
|
mii->mdio = mdio;
|
||||||
|
mii->address = address;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Read from MII register
|
* Read from MII register
|
||||||
*
|
*
|
||||||
* @v mii MII interface
|
* @v mii MII device
|
||||||
* @v reg Register address
|
* @v reg Register address
|
||||||
* @ret data Data read, or negative error
|
* @ret data Data read, or negative error
|
||||||
*/
|
*/
|
||||||
static inline __attribute__ (( always_inline )) int
|
static inline __attribute__ (( always_inline )) int
|
||||||
mii_read ( struct mii_interface *mii, unsigned int reg ) {
|
mii_read ( struct mii_device *mii, unsigned int reg ) {
|
||||||
return mii->op->read ( mii, reg );
|
struct mii_interface *mdio = mii->mdio;
|
||||||
|
|
||||||
|
return mdio->op->read ( mdio, mii->address, reg );
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Write to MII register
|
* Write to MII register
|
||||||
*
|
*
|
||||||
* @v mii MII interface
|
* @v mii MII device
|
||||||
* @v reg Register address
|
* @v reg Register address
|
||||||
* @v data Data to write
|
* @v data Data to write
|
||||||
* @ret rc Return status code
|
* @ret rc Return status code
|
||||||
*/
|
*/
|
||||||
static inline __attribute__ (( always_inline )) int
|
static inline __attribute__ (( always_inline )) int
|
||||||
mii_write ( struct mii_interface *mii, unsigned int reg, unsigned int data ) {
|
mii_write ( struct mii_device *mii, unsigned int reg, unsigned int data ) {
|
||||||
return mii->op->write ( mii, reg, data );
|
struct mii_interface *mdio = mii->mdio;
|
||||||
|
|
||||||
|
return mdio->op->write ( mdio, mii->address, reg, data );
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Dump MII registers (for debugging)
|
* Dump MII registers (for debugging)
|
||||||
*
|
*
|
||||||
* @v mii MII interface
|
* @v mii MII device
|
||||||
*/
|
*/
|
||||||
static inline void
|
static inline void
|
||||||
mii_dump ( struct mii_interface *mii ) {
|
mii_dump ( struct mii_device *mii ) {
|
||||||
unsigned int i;
|
unsigned int i;
|
||||||
int data;
|
int data;
|
||||||
|
|
||||||
|
@ -112,9 +141,9 @@ mii_dump ( struct mii_interface *mii ) {
|
||||||
/** Maximum time to wait for a reset, in milliseconds */
|
/** Maximum time to wait for a reset, in milliseconds */
|
||||||
#define MII_RESET_MAX_WAIT_MS 500
|
#define MII_RESET_MAX_WAIT_MS 500
|
||||||
|
|
||||||
extern int mii_restart ( struct mii_interface *mii );
|
extern int mii_restart ( struct mii_device *mii );
|
||||||
extern int mii_reset ( struct mii_interface *mii );
|
extern int mii_reset ( struct mii_device *mii );
|
||||||
extern int mii_check_link ( struct mii_interface *mii,
|
extern int mii_check_link ( struct mii_device *mii,
|
||||||
struct net_device *netdev );
|
struct net_device *netdev );
|
||||||
|
|
||||||
#endif /* _IPXE_MII_H */
|
#endif /* _IPXE_MII_H */
|
||||||
|
|
Loading…
Reference in New Issue