mirror of https://github.com/ipxe/ipxe.git
[pci] Generalise function-level reset mechanism
Signed-off-by: Michael Brown <mcb30@ipxe.org>pull/697/head^2
parent
9dfcdc04c8
commit
0965cec53c
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@ -1,6 +1,7 @@
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FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
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FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
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#include <stdint.h>
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#include <stdint.h>
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#include <ipxe/timer.h>
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#include <ipxe/pci.h>
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#include <ipxe/pci.h>
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static int pci_find_capability_common ( struct pci_device *pci,
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static int pci_find_capability_common ( struct pci_device *pci,
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@ -112,3 +113,24 @@ unsigned long pci_bar_size ( struct pci_device *pci, unsigned int reg ) {
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size = size & ~( size - 1 );
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size = size & ~( size - 1 );
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return size;
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return size;
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}
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}
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/**
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* Perform PCI Express function-level reset (FLR)
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*
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* @v pci PCI device
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* @v exp PCI Express Capability address
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*/
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void pci_reset ( struct pci_device *pci, unsigned int exp ) {
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uint16_t control;
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/* Perform a PCIe function-level reset */
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pci_read_config_word ( pci, ( exp + PCI_EXP_DEVCTL ), &control );
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control |= PCI_EXP_DEVCTL_FLR;
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pci_write_config_word ( pci, ( exp + PCI_EXP_DEVCTL ), control );
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/* Allow time for reset to complete */
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mdelay ( PCI_EXP_FLR_DELAY_MS );
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/* Re-enable device */
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adjust_pci_device ( pci );
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}
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@ -45,23 +45,6 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
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******************************************************************************
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******************************************************************************
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*/
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*/
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/**
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* Reset hardware via PCIe function-level reset
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*
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* @v intelxl Intel device
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*/
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static void intelxlvf_reset_flr ( struct intelxl_nic *intelxl,
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struct pci_device *pci ) {
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uint16_t control;
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/* Perform a PCIe function-level reset */
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pci_read_config_word ( pci, ( intelxl->exp + PCI_EXP_DEVCTL ),
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&control );
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pci_write_config_word ( pci, ( intelxl->exp + PCI_EXP_DEVCTL ),
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( control | PCI_EXP_DEVCTL_FLR ) );
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mdelay ( INTELXL_RESET_DELAY_MS );
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}
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/**
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/**
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* Wait for admin event queue to be torn down
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* Wait for admin event queue to be torn down
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*
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*
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@ -637,7 +620,7 @@ static int intelxlvf_probe ( struct pci_device *pci ) {
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}
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}
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/* Reset the function via PCIe FLR */
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/* Reset the function via PCIe FLR */
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intelxlvf_reset_flr ( intelxl, pci );
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pci_reset ( pci, intelxl->exp );
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/* Enable MSI-X dummy interrupt */
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/* Enable MSI-X dummy interrupt */
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if ( ( rc = intelxl_msix_enable ( intelxl, pci ) ) != 0 )
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if ( ( rc = intelxl_msix_enable ( intelxl, pci ) ) != 0 )
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@ -669,7 +652,7 @@ static int intelxlvf_probe ( struct pci_device *pci ) {
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err_open_admin:
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err_open_admin:
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intelxl_msix_disable ( intelxl, pci );
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intelxl_msix_disable ( intelxl, pci );
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err_msix:
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err_msix:
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intelxlvf_reset_flr ( intelxl, pci );
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pci_reset ( pci, intelxl->exp );
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err_exp:
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err_exp:
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iounmap ( intelxl->regs );
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iounmap ( intelxl->regs );
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err_ioremap:
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err_ioremap:
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@ -701,7 +684,7 @@ static void intelxlvf_remove ( struct pci_device *pci ) {
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intelxl_msix_disable ( intelxl, pci );
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intelxl_msix_disable ( intelxl, pci );
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/* Reset the function via PCIe FLR */
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/* Reset the function via PCIe FLR */
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intelxlvf_reset_flr ( intelxl, pci );
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pci_reset ( pci, intelxl->exp );
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/* Free network device */
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/* Free network device */
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iounmap ( intelxl->regs );
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iounmap ( intelxl->regs );
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@ -309,6 +309,7 @@ extern int pci_find_capability ( struct pci_device *pci, int capability );
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extern int pci_find_next_capability ( struct pci_device *pci,
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extern int pci_find_next_capability ( struct pci_device *pci,
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int pos, int capability );
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int pos, int capability );
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extern unsigned long pci_bar_size ( struct pci_device *pci, unsigned int reg );
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extern unsigned long pci_bar_size ( struct pci_device *pci, unsigned int reg );
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extern void pci_reset ( struct pci_device *pci, unsigned int exp );
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/**
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/**
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* Initialise PCI device
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* Initialise PCI device
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