mirror of https://github.com/ipxe/ipxe.git
387 lines
10 KiB
C
387 lines
10 KiB
C
#ifndef _INTELXLVF_H
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#define _INTELXLVF_H
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/** @file
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*
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* Intel 40 Gigabit Ethernet virtual function network card driver
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*
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*/
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FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
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#include "intelxl.h"
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/** BAR size */
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#define INTELXLVF_BAR_SIZE 0x10000
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/** MSI-X vector
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*
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* The 100 Gigabit physical function driver requires a virtual
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* function driver to request that transmit and receive queues are
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* mapped to MSI-X vector 1 or higher.
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*/
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#define INTELXLVF_MSIX_VECTOR 1
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/** Transmit Queue Tail Register */
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#define INTELXLVF_QTX_TAIL 0x00000
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/** Receive Queue Tail Register */
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#define INTELXLVF_QRX_TAIL 0x02000
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/** VF Interrupt N Dynamic Control Register */
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#define INTELXLVF_VFINT_DYN_CTLN( x ) ( 0x3800 + ( 0x4 * ( (x) - 1 ) ) )
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/** VF Interrupt Zero Dynamic Control Register */
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#define INTELXLVF_VFINT_DYN_CTL0 0x5c00
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/** VF Admin Queue register block */
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#define INTELXLVF_ADMIN 0x6000
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/** Admin Command Queue Base Address Low Register (offset) */
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#define INTELXLVF_ADMIN_CMD_BAL 0x1c00
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/** Admin Command Queue Base Address High Register (offset) */
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#define INTELXLVF_ADMIN_CMD_BAH 0x1800
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/** Admin Command Queue Length Register (offset) */
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#define INTELXLVF_ADMIN_CMD_LEN 0x0800
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/** Admin Command Queue Head Register (offset) */
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#define INTELXLVF_ADMIN_CMD_HEAD 0x0400
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/** Admin Command Queue Tail Register (offset) */
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#define INTELXLVF_ADMIN_CMD_TAIL 0x2400
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/** Admin Event Queue Base Address Low Register (offset) */
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#define INTELXLVF_ADMIN_EVT_BAL 0x0c00
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/** Admin Event Queue Base Address High Register (offset) */
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#define INTELXLVF_ADMIN_EVT_BAH 0x0000
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/** Admin Event Queue Length Register (offset) */
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#define INTELXLVF_ADMIN_EVT_LEN 0x2000
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/** Admin Event Queue Head Register (offset) */
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#define INTELXLVF_ADMIN_EVT_HEAD 0x1400
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/** Admin Event Queue Tail Register (offset) */
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#define INTELXLVF_ADMIN_EVT_TAIL 0x1000
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/** Maximum time to wait for a VF admin request to complete */
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#define INTELXLVF_ADMIN_MAX_WAIT_MS 2000
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/** Admin queue Send Message to PF command */
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#define INTELXLVF_ADMIN_SEND_TO_PF 0x0801
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/** Admin queue Send Message to VF command */
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#define INTELXLVF_ADMIN_SEND_TO_VF 0x0802
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/** Admin Queue VF Version opcode */
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#define INTELXLVF_ADMIN_VERSION 0x00000001
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/** Admin Queue VF Version data buffer */
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struct intelxlvf_admin_version_buffer {
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/** Major version */
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uint32_t major;
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/** Minor version */
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uint32_t minor;
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} __attribute__ (( packed ));
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/** Admin queue VF API major version */
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#define INTELXLVF_ADMIN_API_MAJOR 1
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/** Admin queue VF API minor version */
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#define INTELXLVF_ADMIN_API_MINOR 0
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/** Admin Queue VF Reset opcode */
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#define INTELXLVF_ADMIN_RESET 0x00000002
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/** Admin Queue VF Get Resources opcode */
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#define INTELXLVF_ADMIN_GET_RESOURCES 0x00000003
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/** Admin Queue VF Get Resources data buffer */
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struct intelxlvf_admin_get_resources_buffer {
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/** Reserved */
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uint8_t reserved_a[20];
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/** VSI switching element ID */
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uint16_t vsi;
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/** Reserved */
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uint8_t reserved_b[8];
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/** MAC address */
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uint8_t mac[ETH_ALEN];
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} __attribute__ (( packed ));
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/** Admin Queue VF Status Change Event opcode */
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#define INTELXLVF_ADMIN_STATUS 0x00000011
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/** Link status change event type */
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#define INTELXLVF_ADMIN_STATUS_LINK 0x00000001
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/** Link status change event data */
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struct intelxlvf_admin_status_link {
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/** Link speed */
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uint32_t speed;
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/** Link status */
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uint8_t status;
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/** Reserved */
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uint8_t reserved[3];
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} __attribute__ (( packed ));
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/** Admin Queue VF Status Change Event data buffer */
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struct intelxlvf_admin_status_buffer {
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/** Event type */
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uint32_t event;
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/** Event data */
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union {
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/** Link change event data */
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struct intelxlvf_admin_status_link link;
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} data;
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/** Reserved */
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uint8_t reserved[4];
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} __attribute__ (( packed ));
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/** Admin Queue VF Configure Queues opcode */
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#define INTELXLVF_ADMIN_CONFIGURE 0x00000006
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/** Admin Queue VF Configure Queues data buffer */
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struct intelxlvf_admin_configure_buffer {
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/** VSI switching element ID */
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uint16_t vsi;
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/** Number of queue pairs */
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uint16_t count;
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/** Reserved */
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uint8_t reserved_a[4];
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/** Transmit queue */
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struct {
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/** VSI switching element ID */
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uint16_t vsi;
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/** Queue ID */
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uint16_t id;
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/** Queue count */
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uint16_t count;
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/** Reserved */
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uint8_t reserved_a[2];
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/** Base address */
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uint64_t base;
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/** Reserved */
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uint8_t reserved_b[8];
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} __attribute__ (( packed )) tx;
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/** Receive queue */
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struct {
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/** VSI switching element ID */
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uint16_t vsi;
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/** Queue ID */
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uint16_t id;
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/** Queue count */
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uint32_t count;
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/** Reserved */
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uint8_t reserved_a[4];
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/** Data buffer length */
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uint32_t len;
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/** Maximum frame size */
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uint32_t mfs;
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/** Reserved */
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uint8_t reserved_b[4];
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/** Base address */
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uint64_t base;
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/** Reserved */
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uint8_t reserved_c[8];
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} __attribute__ (( packed )) rx;
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/** Reserved
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*
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* This field exists only due to a bug in the PF driver's
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* message validation logic, which causes it to miscalculate
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* the expected message length.
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*/
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uint8_t reserved_b[64];
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} __attribute__ (( packed ));
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/** Admin Queue VF IRQ Map opcode */
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#define INTELXLVF_ADMIN_IRQ_MAP 0x00000007
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/** Admin Queue VF IRQ Map data buffer */
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struct intelxlvf_admin_irq_map_buffer {
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/** Number of interrupt vectors */
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uint16_t count;
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/** VSI switching element ID */
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uint16_t vsi;
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/** Interrupt vector ID */
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uint16_t vec;
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/** Receive queue bitmap */
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uint16_t rxmap;
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/** Transmit queue bitmap */
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uint16_t txmap;
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/** Receive interrupt throttling index */
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uint16_t rxitr;
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/** Transmit interrupt throttling index */
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uint16_t txitr;
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/** Reserved
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*
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* This field exists only due to a bug in the PF driver's
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* message validation logic, which causes it to miscalculate
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* the expected message length.
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*/
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uint8_t reserved[12];
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} __attribute__ (( packed ));
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/** Admin Queue VF Enable Queues opcode */
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#define INTELXLVF_ADMIN_ENABLE 0x00000008
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/** Admin Queue VF Disable Queues opcode */
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#define INTELXLVF_ADMIN_DISABLE 0x00000009
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/** Admin Queue VF Enable/Disable Queues data buffer */
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struct intelxlvf_admin_queues_buffer {
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/** VSI switching element ID */
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uint16_t vsi;
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/** Reserved */
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uint8_t reserved[2];
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/** Receive queue bitmask */
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uint32_t rx;
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/** Transmit queue bitmask */
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uint32_t tx;
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} __attribute__ (( packed ));
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/** Admin Queue VF Configure Promiscuous Mode opcode */
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#define INTELXLVF_ADMIN_PROMISC 0x0000000e
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/** Admin Queue VF Configure Promiscuous Mode data buffer */
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struct intelxlvf_admin_promisc_buffer {
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/** VSI switching element ID */
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uint16_t vsi;
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/** Flags */
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uint16_t flags;
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} __attribute__ (( packed ));
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/** Admin Queue VF Get Statistics opcode */
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#define INTELXLVF_ADMIN_GET_STATS 0x0000000f
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/** VF statistics */
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struct intelxlvf_admin_stats {
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/** Bytes */
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uint64_t bytes;
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/** Unicast packets */
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uint64_t unicasts;
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/** Multicast packets */
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uint64_t multicasts;
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/** Broadcast packets */
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uint64_t broadcasts;
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/** Discarded packets */
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uint64_t discards;
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/** Errors */
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uint64_t errors;
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} __attribute__ (( packed ));
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/** Admin Queue VF Get Statistics data buffer */
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struct intelxlvf_admin_stats_buffer {
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/** Receive statistics */
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struct intelxlvf_admin_stats rx;
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/** Transmit statistics */
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struct intelxlvf_admin_stats tx;
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} __attribute__ (( packed ));
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/** Admin queue data buffer */
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union intelxlvf_admin_buffer {
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/** Original 40 Gigabit Ethernet data buffer */
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union intelxl_admin_buffer xl;
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/** VF Version data buffer */
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struct intelxlvf_admin_version_buffer ver;
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/** VF Get Resources data buffer */
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struct intelxlvf_admin_get_resources_buffer res;
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/** VF Status Change Event data buffer */
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struct intelxlvf_admin_status_buffer stat;
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/** VF Configure Queues data buffer */
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struct intelxlvf_admin_configure_buffer cfg;
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/** VF Enable/Disable Queues data buffer */
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struct intelxlvf_admin_queues_buffer queues;
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/** VF Configure Promiscuous Mode data buffer */
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struct intelxlvf_admin_promisc_buffer promisc;
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/** VF IRQ Map data buffer */
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struct intelxlvf_admin_irq_map_buffer irq;
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/** VF Get Statistics data buffer */
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struct intelxlvf_admin_stats_buffer stats;
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} __attribute__ (( packed ));
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/** Admin queue descriptor */
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struct intelxlvf_admin_descriptor {
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/** Transparent union */
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union {
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/** Original 40 Gigabit Ethernet descriptor */
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struct intelxl_admin_descriptor xl;
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/** Transparent struct */
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struct {
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/** Flags */
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uint16_t flags;
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/** Opcode */
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uint16_t opcode;
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/** Data length */
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uint16_t len;
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/** Return value */
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uint16_t ret;
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/** VF opcode */
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uint32_t vopcode;
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/** VF return value */
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int32_t vret;
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/** Parameters */
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union intelxl_admin_params params;
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} __attribute__ (( packed ));
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} __attribute__ (( packed ));
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} __attribute__ (( packed ));
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/**
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* Get next admin command queue descriptor
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*
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* @v intelxl Intel device
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* @ret cmd Command descriptor
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*/
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struct intelxlvf_admin_descriptor *
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intelxlvf_admin_command_descriptor ( struct intelxl_nic *intelxl ) {
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struct intelxl_admin_descriptor *xlcmd =
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intelxl_admin_command_descriptor ( intelxl );
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return container_of ( xlcmd, struct intelxlvf_admin_descriptor, xl );
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}
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/**
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* Get next admin command queue data buffer
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*
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* @v intelxl Intel device
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* @ret buf Data buffer
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*/
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static inline __attribute__ (( always_inline )) union intelxlvf_admin_buffer *
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intelxlvf_admin_command_buffer ( struct intelxl_nic *intelxl ) {
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union intelxl_admin_buffer *xlbuf =
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intelxl_admin_command_buffer ( intelxl );
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return container_of ( xlbuf, union intelxlvf_admin_buffer, xl );
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}
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/** VF Reset Status Register */
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#define INTELXLVF_VFGEN_RSTAT 0x8800
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#define INTELXLVF_VFGEN_RSTAT_VFR_STATE(x) ( (x) & 0x3 )
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#define INTELXLVF_VFGEN_RSTAT_VFR_STATE_ACTIVE 0x2
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/** Minimum time to wait for reset to complete */
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#define INTELXLVF_RESET_DELAY_MS 100
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/** Maximum time to wait for reset to complete */
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#define INTELXLVF_RESET_MAX_WAIT_MS 1000
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/**
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* Initialise descriptor ring
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*
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* @v ring Descriptor ring
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* @v count Number of descriptors
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* @v len Length of a single descriptor
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* @v tail Tail register offset
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*/
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static inline __attribute__ (( always_inline)) void
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intelxlvf_init_ring ( struct intelxl_ring *ring, unsigned int count,
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size_t len, unsigned int tail ) {
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ring->len = ( count * len );
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ring->tail = tail;
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}
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#endif /* _INTELXLVF_H */
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