mirror of https://github.com/ipxe/ipxe.git
125 lines
3.9 KiB
C
125 lines
3.9 KiB
C
/*******************************************************************************
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Intel(R) Gigabit Ethernet Linux driver
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Copyright(c) 2007-2009 Intel Corporation.
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This program is free software; you can redistribute it and/or modify it
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under the terms and conditions of the GNU General Public License,
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version 2, as published by the Free Software Foundation.
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This program is distributed in the hope it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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You should have received a copy of the GNU General Public License along with
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this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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The full GNU General Public License is included in this distribution in
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the file called "COPYING".
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Contact Information:
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e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
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Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*******************************************************************************/
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FILE_LICENCE ( GPL2_ONLY );
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/* glue for the OS independent part of e1000
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* includes register access macros
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*/
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#ifndef _IGB_OSDEP_H_
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#define _IGB_OSDEP_H_
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/* Begin OS Dependencies */
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#define u8 unsigned char
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#define bool boolean_t
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#define dma_addr_t unsigned long
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#define __le16 uint16_t
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#define __le32 uint32_t
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#define __le64 uint64_t
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#define __iomem
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#define __devinit
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#define msleep(x) mdelay(x)
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#define ETH_FCS_LEN 4
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typedef int spinlock_t;
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typedef enum {
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false = 0,
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true = 1
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} boolean_t;
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#define TRUE 1
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#define FALSE 0
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#define usec_delay(x) udelay(x)
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#define msec_delay(x) mdelay(x)
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#define msec_delay_irq(x) mdelay(x)
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/* End OS Dependencies */
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#define PCI_COMMAND_REGISTER PCI_COMMAND
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#define CMD_MEM_WRT_INVALIDATE PCI_COMMAND_INVALIDATE
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#define ETH_ADDR_LEN ETH_ALEN
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#define DEBUGOUT(S) if (0) { printf(S); }
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#define DEBUGOUT1(S, A...) if (0) { printf(S, A); }
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#define DEBUGFUNC(F) DEBUGOUT(F "\n")
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#define DEBUGOUT2 DEBUGOUT1
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#define DEBUGOUT3 DEBUGOUT2
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#define DEBUGOUT7 DEBUGOUT3
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#define E1000_REGISTER(a, reg) (reg)
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#define E1000_WRITE_REG(a, reg, value) do { \
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writel((value), ((a)->hw_addr + E1000_REGISTER(a, reg))); } while (0)
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#define E1000_READ_REG(a, reg) (readl((a)->hw_addr + E1000_REGISTER(a, reg)))
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#define E1000_WRITE_REG_ARRAY(a, reg, offset, value) do { \
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writel((value), ((a)->hw_addr + E1000_REGISTER(a, reg) + ((offset) << 2))); } while (0);
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#define E1000_READ_REG_ARRAY(a, reg, offset) ( \
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readl((a)->hw_addr + E1000_REGISTER(a, reg) + ((offset) << 2)))
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#define E1000_READ_REG_ARRAY_DWORD E1000_READ_REG_ARRAY
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#define E1000_WRITE_REG_ARRAY_DWORD E1000_WRITE_REG_ARRAY
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#define E1000_WRITE_REG_ARRAY_WORD(a, reg, offset, value) ( \
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writew((value), ((a)->hw_addr + E1000_REGISTER(a, reg) + ((offset) << 1))))
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#define E1000_READ_REG_ARRAY_WORD(a, reg, offset) ( \
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readw((a)->hw_addr + E1000_REGISTER(a, reg) + ((offset) << 1)))
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#define E1000_WRITE_REG_ARRAY_BYTE(a, reg, offset, value) ( \
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writeb((value), ((a)->hw_addr + E1000_REGISTER(a, reg) + (offset))))
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#define E1000_READ_REG_ARRAY_BYTE(a, reg, offset) ( \
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readb((a)->hw_addr + E1000_REGISTER(a, reg) + (offset)))
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#define E1000_WRITE_REG_IO(a, reg, offset) do { \
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outl(reg, ((a)->io_base)); \
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outl(offset, ((a)->io_base + 4)); } while (0)
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#define E1000_WRITE_FLUSH(a) E1000_READ_REG(a, E1000_STATUS)
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#define E1000_WRITE_FLASH_REG(a, reg, value) ( \
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writel((value), ((a)->flash_address + reg)))
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#define E1000_WRITE_FLASH_REG16(a, reg, value) ( \
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writew((value), ((a)->flash_address + reg)))
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#define E1000_READ_FLASH_REG(a, reg) (readl((a)->flash_address + reg))
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#define E1000_READ_FLASH_REG16(a, reg) (readw((a)->flash_address + reg))
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#endif /* _IGB_OSDEP_H_ */
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