mirror of https://github.com/ipxe/ipxe.git
[intel] Correct definition of receive overrun bit
Reported-by: Robin Smidsrød <robin@smidsrod.no> Tested-by: Robin Smidsrød <robin@smidsrod.no> Signed-off-by: Michael Brown <mcb30@ipxe.org>pull/42/head
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@ -99,8 +99,8 @@ struct intel_descriptor {
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#define INTEL_IRQ_TXQE 0x00000002UL /**< Transmit queue empty */
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#define INTEL_IRQ_LSC 0x00000004UL /**< Link status change */
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#define INTEL_IRQ_RXDMT0 0x00000010UL /**< Receive queue low */
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#define INTEL_IRQ_RXO 0x00000040UL /**< Receive overrun */
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#define INTEL_IRQ_RXT0 0x00000080UL /**< Receive timer */
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#define INTEL_IRQ_RXO 0x00000400UL /**< Receive overrun */
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/** Interrupt Mask Set/Read Register */
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#define INTEL_IMS 0x000d0UL
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