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[intelxl] Use function-level reset instead of PFGEN_CTRL.PFSWR 

Remove knowledge of the PFGEN_CTRL register (which changes location
between XL710 and E810 register maps), and instead use PCIe FLR to
reset the physical function.

Signed-off-by: Michael Brown <mcb30@ipxe.org>
pull/697/head^2
Michael Brown 2022-03-17 13:45:31 +00:00
parent 0965cec53c
commit a202de385d
4 changed files with 18 additions and 39 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

45
src/drivers/net/intelxl.c
View File

@ -44,31 +44,6 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
*
*/
/******************************************************************************
*
* Device reset
*
******************************************************************************
*/
/**
* Reset hardware
*
* @v intelxl Intel device
* @ret rc Return status code
*/
static int intelxl_reset ( struct intelxl_nic *intelxl ) {
uint32_t pfgen_ctrl;
/* Perform a global software reset */
pfgen_ctrl = readl ( intelxl->regs + INTELXL_PFGEN_CTRL );
writel ( ( pfgen_ctrl | INTELXL_PFGEN_CTRL_PFSWR ),
intelxl->regs + INTELXL_PFGEN_CTRL );
mdelay ( INTELXL_RESET_DELAY_MS );
return 0;
}
/******************************************************************************
*
* MAC address
@ -1704,9 +1679,17 @@ static int intelxl_probe ( struct pci_device *pci ) {
dma_set_mask_64bit ( intelxl->dma );
netdev->dma = intelxl->dma;
/* Reset the NIC */
if ( ( rc = intelxl_reset ( intelxl ) ) != 0 )
goto err_reset;
/* Locate PCI Express capability */
intelxl->exp = pci_find_capability ( pci, PCI_CAP_ID_EXP );
if ( ! intelxl->exp ) {
DBGC ( intelxl, "INTELXL %p missing PCIe capability\n",
intelxl );
rc = -ENXIO;
goto err_exp;
}
/* Reset the function via PCIe FLR */
pci_reset ( pci, intelxl->exp );
/* Get function number, port number and base queue number */
pffunc_rid = readl ( intelxl->regs + INTELXL_PFFUNC_RID );
@ -1787,8 +1770,8 @@ static int intelxl_probe ( struct pci_device *pci ) {
intelxl_msix_disable ( intelxl, pci );
err_msix:
err_fetch_mac:
intelxl_reset ( intelxl );
err_reset:
pci_reset ( pci, intelxl->exp );
err_exp:
iounmap ( intelxl->regs );
err_ioremap:
netdev_nullify ( netdev );
@ -1816,7 +1799,7 @@ static void intelxl_remove ( struct pci_device *pci ) {
intelxl_msix_disable ( intelxl, pci );
/* Reset the NIC */
intelxl_reset ( intelxl );
pci_reset ( pci, intelxl->exp );
/* Free network device */
iounmap ( intelxl->regs );

7
src/drivers/net/intelxl.h
View File

@ -985,13 +985,6 @@ intelxl_init_ring ( struct intelxl_ring *ring, unsigned int count, size_t len,
INTELXL_QINT_TQCTL_NEXTQ_TYPE ( 0x1 ) /**< Transmit queue */
#define INTELXL_QINT_TQCTL_CAUSE_ENA 0x40000000UL /**< Enable */
/** PF Control Register */
#define INTELXL_PFGEN_CTRL 0x092400
#define INTELXL_PFGEN_CTRL_PFSWR 0x00000001UL /**< Software Reset */
/** Time to delay for device reset, in milliseconds */
#define INTELXL_RESET_DELAY_MS 100
/** Function Requester ID Information Register */
#define INTELXL_PFFUNC_RID 0x09c000
#define INTELXL_PFFUNC_RID_FUNC_NUM(x) \

2
src/drivers/net/intelxlvf.c
View File

@ -122,7 +122,7 @@ static int intelxlvf_reset_admin ( struct intelxl_nic *intelxl ) {
goto err_command;
/* Wait for minimum reset time */
mdelay ( INTELXL_RESET_DELAY_MS );
mdelay ( INTELXLVF_RESET_DELAY_MS );
/* Wait for reset to take effect */
if ( ( rc = intelxlvf_reset_wait_teardown ( intelxl ) ) != 0 )

3
src/drivers/net/intelxlvf.h
View File

@ -64,6 +64,9 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
#define INTELXLVF_VFGEN_RSTAT_VFR_STATE(x) ( (x) & 0x3 )
#define INTELXLVF_VFGEN_RSTAT_VFR_STATE_ACTIVE 0x2
/** Minimum time to wait for reset to complete */
#define INTELXLVF_RESET_DELAY_MS 100
/** Maximum time to wait for reset to complete */
#define INTELXLVF_RESET_MAX_WAIT_MS 1000