mirror of https://github.com/ipxe/ipxe.git
[virtio] Add virtio 1.0 PCI support
This commit adds support for driving virtio 1.0 PCI devices. In addition to various helpers, a number of vpm_ functions are introduced to be used instead of their legacy vp_ counterparts when accessing virtio 1.0 (aka modern) devices. Signed-off-by: Ladi Prosek <lprosek@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Modified-by: Michael Brown <mcb30@ipxe.org> Signed-off-by: Michael Brown <mcb30@ipxe.org>pull/52/head
parent
7b499f849e
commit
8a055a2a70
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@ -11,10 +11,15 @@
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*
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*/
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#include "errno.h"
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#include "byteswap.h"
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#include "etherboot.h"
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#include "ipxe/io.h"
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#include "ipxe/virtio-ring.h"
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#include "ipxe/iomap.h"
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#include "ipxe/pci.h"
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#include "ipxe/reboot.h"
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#include "ipxe/virtio-pci.h"
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#include "ipxe/virtio-ring.h"
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int vp_find_vq(unsigned int ioaddr, int queue_index,
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struct vring_virtqueue *vq)
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@ -30,19 +35,19 @@ int vp_find_vq(unsigned int ioaddr, int queue_index,
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num = inw(ioaddr + VIRTIO_PCI_QUEUE_NUM);
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if (!num) {
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printf("ERROR: queue size is 0\n");
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DBG("VIRTIO-PCI ERROR: queue size is 0\n");
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return -1;
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}
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if (num > MAX_QUEUE_NUM) {
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printf("ERROR: queue size %d > %d\n", num, MAX_QUEUE_NUM);
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DBG("VIRTIO-PCI ERROR: queue size %d > %d\n", num, MAX_QUEUE_NUM);
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return -1;
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}
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/* check if the queue is already active */
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if (inl(ioaddr + VIRTIO_PCI_QUEUE_PFN)) {
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printf("ERROR: queue already active\n");
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DBG("VIRTIO-PCI ERROR: queue already active\n");
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return -1;
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}
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@ -62,3 +67,343 @@ int vp_find_vq(unsigned int ioaddr, int queue_index,
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return num;
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}
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#define CFG_POS(vdev, field) \
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(vdev->cfg_cap_pos + offsetof(struct virtio_pci_cfg_cap, field))
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static void prep_pci_cfg_cap(struct virtio_pci_modern_device *vdev,
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struct virtio_pci_region *region,
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size_t offset, u32 length)
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{
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pci_write_config_byte(vdev->pci, CFG_POS(vdev, cap.bar), region->bar);
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pci_write_config_dword(vdev->pci, CFG_POS(vdev, cap.length), length);
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pci_write_config_dword(vdev->pci, CFG_POS(vdev, cap.offset),
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(intptr_t)(region->base + offset));
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}
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void vpm_iowrite8(struct virtio_pci_modern_device *vdev,
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struct virtio_pci_region *region, u8 data, size_t offset)
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{
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switch (region->flags & VIRTIO_PCI_REGION_TYPE_MASK) {
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case VIRTIO_PCI_REGION_MEMORY:
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writeb(data, region->base + offset);
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break;
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case VIRTIO_PCI_REGION_PORT:
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outb(data, region->base + offset);
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break;
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case VIRTIO_PCI_REGION_PCI_CONFIG:
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prep_pci_cfg_cap(vdev, region, offset, 1);
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pci_write_config_byte(vdev->pci, CFG_POS(vdev, pci_cfg_data), data);
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break;
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default:
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assert(0);
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break;
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}
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}
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void vpm_iowrite16(struct virtio_pci_modern_device *vdev,
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struct virtio_pci_region *region, u16 data, size_t offset)
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{
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data = cpu_to_le16(data);
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switch (region->flags & VIRTIO_PCI_REGION_TYPE_MASK) {
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case VIRTIO_PCI_REGION_MEMORY:
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writew(data, region->base + offset);
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break;
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case VIRTIO_PCI_REGION_PORT:
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outw(data, region->base + offset);
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break;
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case VIRTIO_PCI_REGION_PCI_CONFIG:
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prep_pci_cfg_cap(vdev, region, offset, 2);
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pci_write_config_word(vdev->pci, CFG_POS(vdev, pci_cfg_data), data);
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break;
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default:
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assert(0);
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break;
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}
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}
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void vpm_iowrite32(struct virtio_pci_modern_device *vdev,
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struct virtio_pci_region *region, u32 data, size_t offset)
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{
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data = cpu_to_le32(data);
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switch (region->flags & VIRTIO_PCI_REGION_TYPE_MASK) {
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case VIRTIO_PCI_REGION_MEMORY:
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writel(data, region->base + offset);
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break;
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case VIRTIO_PCI_REGION_PORT:
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outl(data, region->base + offset);
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break;
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case VIRTIO_PCI_REGION_PCI_CONFIG:
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prep_pci_cfg_cap(vdev, region, offset, 4);
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pci_write_config_dword(vdev->pci, CFG_POS(vdev, pci_cfg_data), data);
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break;
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default:
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assert(0);
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break;
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}
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}
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u8 vpm_ioread8(struct virtio_pci_modern_device *vdev,
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struct virtio_pci_region *region, size_t offset)
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{
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uint8_t data;
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switch (region->flags & VIRTIO_PCI_REGION_TYPE_MASK) {
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case VIRTIO_PCI_REGION_MEMORY:
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data = readb(region->base + offset);
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break;
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case VIRTIO_PCI_REGION_PORT:
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data = inb(region->base + offset);
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break;
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case VIRTIO_PCI_REGION_PCI_CONFIG:
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prep_pci_cfg_cap(vdev, region, offset, 1);
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pci_read_config_byte(vdev->pci, CFG_POS(vdev, pci_cfg_data), &data);
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break;
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default:
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assert(0);
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data = 0;
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break;
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}
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return data;
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}
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u16 vpm_ioread16(struct virtio_pci_modern_device *vdev,
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struct virtio_pci_region *region, size_t offset)
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{
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uint16_t data;
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switch (region->flags & VIRTIO_PCI_REGION_TYPE_MASK) {
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case VIRTIO_PCI_REGION_MEMORY:
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data = readw(region->base + offset);
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break;
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case VIRTIO_PCI_REGION_PORT:
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data = inw(region->base + offset);
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break;
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case VIRTIO_PCI_REGION_PCI_CONFIG:
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prep_pci_cfg_cap(vdev, region, offset, 2);
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pci_read_config_word(vdev->pci, CFG_POS(vdev, pci_cfg_data), &data);
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break;
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default:
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assert(0);
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data = 0;
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break;
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}
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return le16_to_cpu(data);
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}
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u32 vpm_ioread32(struct virtio_pci_modern_device *vdev,
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struct virtio_pci_region *region, size_t offset)
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{
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uint32_t data;
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switch (region->flags & VIRTIO_PCI_REGION_TYPE_MASK) {
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case VIRTIO_PCI_REGION_MEMORY:
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data = readw(region->base + offset);
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break;
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case VIRTIO_PCI_REGION_PORT:
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data = inw(region->base + offset);
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break;
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case VIRTIO_PCI_REGION_PCI_CONFIG:
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prep_pci_cfg_cap(vdev, region, offset, 4);
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pci_read_config_dword(vdev->pci, CFG_POS(vdev, pci_cfg_data), &data);
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break;
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default:
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assert(0);
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data = 0;
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break;
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}
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return le32_to_cpu(data);
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}
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int virtio_pci_find_capability(struct pci_device *pci, uint8_t cfg_type)
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{
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int pos;
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uint8_t type, bar;
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for (pos = pci_find_capability(pci, PCI_CAP_ID_VNDR);
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pos > 0;
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pos = pci_find_next_capability(pci, pos, PCI_CAP_ID_VNDR)) {
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pci_read_config_byte(pci, pos + offsetof(struct virtio_pci_cap,
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cfg_type), &type);
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pci_read_config_byte(pci, pos + offsetof(struct virtio_pci_cap,
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bar), &bar);
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/* Ignore structures with reserved BAR values */
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if (bar > 0x5) {
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continue;
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}
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if (type == cfg_type) {
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return pos;
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}
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}
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return 0;
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}
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int virtio_pci_map_capability(struct pci_device *pci, int cap, size_t minlen,
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u32 align, u32 start, u32 size,
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struct virtio_pci_region *region)
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{
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u8 bar;
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u32 offset, length, base_raw;
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unsigned long base;
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pci_read_config_byte(pci, cap + offsetof(struct virtio_pci_cap, bar), &bar);
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pci_read_config_dword(pci, cap + offsetof(struct virtio_pci_cap, offset),
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&offset);
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pci_read_config_dword(pci, cap + offsetof(struct virtio_pci_cap, length),
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&length);
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if (length <= start) {
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DBG("VIRTIO-PCI bad capability len %u (>%u expected)\n", length, start);
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return -EINVAL;
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}
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if (length - start < minlen) {
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DBG("VIRTIO-PCI bad capability len %u (>=%zu expected)\n", length, minlen);
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return -EINVAL;
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}
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length -= start;
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if (start + offset < offset) {
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DBG("VIRTIO-PCI map wrap-around %u+%u\n", start, offset);
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return -EINVAL;
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}
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offset += start;
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if (offset & (align - 1)) {
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DBG("VIRTIO-PCI offset %u not aligned to %u\n", offset, align);
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return -EINVAL;
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}
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if (length > size) {
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length = size;
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}
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if (minlen + offset < minlen ||
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minlen + offset > pci_bar_size(pci, PCI_BASE_ADDRESS(bar))) {
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DBG("VIRTIO-PCI map virtio %zu@%u out of range on bar %i length %lu\n",
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minlen, offset,
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bar, (unsigned long)pci_bar_size(pci, PCI_BASE_ADDRESS(bar)));
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return -EINVAL;
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}
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region->base = NULL;
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region->length = length;
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region->bar = bar;
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base = pci_bar_start(pci, PCI_BASE_ADDRESS(bar));
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if (base) {
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pci_read_config_dword(pci, PCI_BASE_ADDRESS(bar), &base_raw);
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if (base_raw & PCI_BASE_ADDRESS_SPACE_IO) {
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/* Region accessed using port I/O */
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region->base = (void *)(base + offset);
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region->flags = VIRTIO_PCI_REGION_PORT;
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} else {
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/* Region mapped into memory space */
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region->base = ioremap(base + offset, length);
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region->flags = VIRTIO_PCI_REGION_MEMORY;
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}
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}
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if (!region->base) {
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/* Region accessed via PCI config space window */
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region->base = (void *)(intptr_t)offset;
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region->flags = VIRTIO_PCI_REGION_PCI_CONFIG;
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}
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return 0;
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}
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void virtio_pci_unmap_capability(struct virtio_pci_region *region)
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{
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unsigned region_type = region->flags & VIRTIO_PCI_REGION_TYPE_MASK;
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if (region_type == VIRTIO_PCI_REGION_MEMORY) {
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iounmap(region->base);
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}
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}
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void vpm_notify(struct virtio_pci_modern_device *vdev,
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struct vring_virtqueue *vq)
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{
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vpm_iowrite16(vdev, &vq->notification, (u16)vq->queue_index, 0);
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}
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int vpm_find_vqs(struct virtio_pci_modern_device *vdev,
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unsigned nvqs, struct vring_virtqueue *vqs)
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{
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unsigned i;
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struct vring_virtqueue *vq;
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u16 size, off;
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u32 notify_offset_multiplier;
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int err;
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if (nvqs > vpm_ioread16(vdev, &vdev->common, COMMON_OFFSET(num_queues))) {
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return -ENOENT;
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}
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/* Read notify_off_multiplier from config space. */
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pci_read_config_dword(vdev->pci,
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vdev->notify_cap_pos + offsetof(struct virtio_pci_notify_cap,
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notify_off_multiplier),
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¬ify_offset_multiplier);
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for (i = 0; i < nvqs; i++) {
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/* Select the queue we're interested in */
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vpm_iowrite16(vdev, &vdev->common, (u16)i, COMMON_OFFSET(queue_select));
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/* Check if queue is either not available or already active. */
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size = vpm_ioread16(vdev, &vdev->common, COMMON_OFFSET(queue_size));
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/* QEMU has a bug where queues don't revert to inactive on device
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* reset. Skip checking the queue_enable field until it is fixed.
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*/
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if (!size /*|| vpm_ioread16(vdev, &vdev->common.queue_enable)*/)
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return -ENOENT;
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if (size & (size - 1)) {
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DBG("VIRTIO-PCI %p: bad queue size %u", vdev, size);
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return -EINVAL;
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}
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vq = &vqs[i];
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vq->queue_index = i;
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/* get offset of notification word for this vq */
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off = vpm_ioread16(vdev, &vdev->common, COMMON_OFFSET(queue_notify_off));
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vq->vring.num = size;
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vring_init(&vq->vring, size, (unsigned char *)vq->queue);
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/* activate the queue */
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vpm_iowrite16(vdev, &vdev->common, size, COMMON_OFFSET(queue_size));
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vpm_iowrite64(vdev, &vdev->common, virt_to_phys(vq->vring.desc),
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COMMON_OFFSET(queue_desc_lo),
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COMMON_OFFSET(queue_desc_hi));
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vpm_iowrite64(vdev, &vdev->common, virt_to_phys(vq->vring.avail),
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COMMON_OFFSET(queue_avail_lo),
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COMMON_OFFSET(queue_avail_hi));
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vpm_iowrite64(vdev, &vdev->common, virt_to_phys(vq->vring.used),
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COMMON_OFFSET(queue_used_lo),
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COMMON_OFFSET(queue_used_hi));
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err = virtio_pci_map_capability(vdev->pci,
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vdev->notify_cap_pos, 2, 2,
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off * notify_offset_multiplier, 2,
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&vq->notification);
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if (err) {
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goto err_map_notify;
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}
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}
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/* Select and activate all queues. Has to be done last: once we do
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* this, there's no way to go back except reset.
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*/
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for (i = 0; i < nvqs; i++) {
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vq = &vqs[i];
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vpm_iowrite16(vdev, &vdev->common, (u16)vq->queue_index,
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COMMON_OFFSET(queue_select));
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vpm_iowrite16(vdev, &vdev->common, 1, COMMON_OFFSET(queue_enable));
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}
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return 0;
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err_map_notify:
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/* Undo the virtio_pci_map_capability calls. */
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while (i-- > 0) {
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virtio_pci_unmap_capability(&vqs[i].notification);
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}
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return err;
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}
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@ -18,8 +18,8 @@ FILE_LICENCE ( GPL2_OR_LATER );
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#include "etherboot.h"
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#include "ipxe/io.h"
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#include "ipxe/virtio-ring.h"
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#include "ipxe/virtio-pci.h"
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#include "ipxe/virtio-ring.h"
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#define BUG() do { \
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printf("BUG: failure at %s:%d/%s()!\n", \
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@ -122,7 +122,8 @@ void vring_add_buf(struct vring_virtqueue *vq,
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wmb();
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}
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void vring_kick(unsigned int ioaddr, struct vring_virtqueue *vq, int num_added)
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void vring_kick(struct virtio_pci_modern_device *vdev, unsigned int ioaddr,
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struct vring_virtqueue *vq, int num_added)
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{
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struct vring *vr = &vq->vring;
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@ -130,7 +131,13 @@ void vring_kick(unsigned int ioaddr, struct vring_virtqueue *vq, int num_added)
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vr->avail->idx += num_added;
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mb();
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if (!(vr->used->flags & VRING_USED_F_NO_NOTIFY))
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vp_notify(ioaddr, vq->queue_index);
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if (!(vr->used->flags & VRING_USED_F_NO_NOTIFY)) {
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if (vdev) {
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/* virtio 1.0 */
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vpm_notify(vdev, vq);
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} else {
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/* legacy virtio */
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vp_notify(ioaddr, vq->queue_index);
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}
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}
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}
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@ -24,14 +24,15 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
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#include <errno.h>
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#include <stdlib.h>
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#include <unistd.h>
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#include <ipxe/list.h>
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#include <ipxe/iobuf.h>
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#include <ipxe/netdevice.h>
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#include <ipxe/pci.h>
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#include <ipxe/if_ether.h>
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#include <ipxe/ethernet.h>
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#include <ipxe/virtio-ring.h>
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#include <ipxe/virtio-pci.h>
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#include <ipxe/virtio-ring.h>
|
||||
#include "virtio-net.h"
|
||||
|
||||
/*
|
||||
|
@ -135,7 +136,7 @@ static void virtnet_enqueue_iob ( struct net_device *netdev,
|
|||
virtnet, iobuf, vq_idx );
|
||||
|
||||
vring_add_buf ( vq, list, out, in, iobuf, 0 );
|
||||
vring_kick ( virtnet->ioaddr, vq, 1 );
|
||||
vring_kick ( NULL, virtnet->ioaddr, vq, 1 );
|
||||
}
|
||||
|
||||
/** Try to keep rx virtqueue filled with iobufs
|
||||
|
|
|
@ -188,6 +188,7 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
|
|||
#define ERRFILE_eoib ( ERRFILE_DRIVER | 0x007c0000 )
|
||||
#define ERRFILE_golan ( ERRFILE_DRIVER | 0x007d0000 )
|
||||
#define ERRFILE_flexboot_nodnic ( ERRFILE_DRIVER | 0x007e0000 )
|
||||
#define ERRFILE_virtio_pci ( ERRFILE_DRIVER | 0x007f0000 )
|
||||
|
||||
#define ERRFILE_aoe ( ERRFILE_NET | 0x00000000 )
|
||||
#define ERRFILE_arp ( ERRFILE_NET | 0x00010000 )
|
||||
|
|
|
@ -97,6 +97,44 @@ struct virtio_pci_common_cfg {
|
|||
__le32 queue_used_hi; /* read-write */
|
||||
};
|
||||
|
||||
/* Virtio 1.0 PCI region descriptor. We support memory mapped I/O, port I/O,
|
||||
* and PCI config space access via the cfg PCI capability as a fallback. */
|
||||
struct virtio_pci_region {
|
||||
void *base;
|
||||
size_t length;
|
||||
u8 bar;
|
||||
|
||||
/* How to interpret the base field */
|
||||
#define VIRTIO_PCI_REGION_TYPE_MASK 0x00000003
|
||||
/* The base field is a memory address */
|
||||
#define VIRTIO_PCI_REGION_MEMORY 0x00000000
|
||||
/* The base field is a port address */
|
||||
#define VIRTIO_PCI_REGION_PORT 0x00000001
|
||||
/* The base field is an offset within the PCI bar */
|
||||
#define VIRTIO_PCI_REGION_PCI_CONFIG 0x00000002
|
||||
unsigned flags;
|
||||
};
|
||||
|
||||
/* Virtio 1.0 device state */
|
||||
struct virtio_pci_modern_device {
|
||||
struct pci_device *pci;
|
||||
|
||||
/* VIRTIO_PCI_CAP_PCI_CFG position */
|
||||
int cfg_cap_pos;
|
||||
|
||||
/* VIRTIO_PCI_CAP_COMMON_CFG data */
|
||||
struct virtio_pci_region common;
|
||||
|
||||
/* VIRTIO_PCI_CAP_DEVICE_CFG data */
|
||||
struct virtio_pci_region device;
|
||||
|
||||
/* VIRTIO_PCI_CAP_ISR_CFG data */
|
||||
struct virtio_pci_region isr;
|
||||
|
||||
/* VIRTIO_PCI_CAP_NOTIFY_CFG data */
|
||||
int notify_cap_pos;
|
||||
};
|
||||
|
||||
static inline u32 vp_get_features(unsigned int ioaddr)
|
||||
{
|
||||
return inl(ioaddr + VIRTIO_PCI_HOST_FEATURES);
|
||||
|
@ -156,6 +194,115 @@ static inline void vp_del_vq(unsigned int ioaddr, int queue_index)
|
|||
outl(0, ioaddr + VIRTIO_PCI_QUEUE_PFN);
|
||||
}
|
||||
|
||||
struct vring_virtqueue;
|
||||
|
||||
int vp_find_vq(unsigned int ioaddr, int queue_index,
|
||||
struct vring_virtqueue *vq);
|
||||
|
||||
/* Virtio 1.0 I/O routines abstract away the three possible HW access
|
||||
* mechanisms - memory, port I/O, and PCI cfg space access. Also built-in
|
||||
* are endianness conversions - to LE on write and from LE on read. */
|
||||
|
||||
void vpm_iowrite8(struct virtio_pci_modern_device *vdev,
|
||||
struct virtio_pci_region *region, u8 data, size_t offset);
|
||||
|
||||
void vpm_iowrite16(struct virtio_pci_modern_device *vdev,
|
||||
struct virtio_pci_region *region, u16 data, size_t offset);
|
||||
|
||||
void vpm_iowrite32(struct virtio_pci_modern_device *vdev,
|
||||
struct virtio_pci_region *region, u32 data, size_t offset);
|
||||
|
||||
static inline void vpm_iowrite64(struct virtio_pci_modern_device *vdev,
|
||||
struct virtio_pci_region *region,
|
||||
u64 data, size_t offset_lo, size_t offset_hi)
|
||||
{
|
||||
vpm_iowrite32(vdev, region, (u32)data, offset_lo);
|
||||
vpm_iowrite32(vdev, region, data >> 32, offset_hi);
|
||||
}
|
||||
|
||||
u8 vpm_ioread8(struct virtio_pci_modern_device *vdev,
|
||||
struct virtio_pci_region *region, size_t offset);
|
||||
|
||||
u16 vpm_ioread16(struct virtio_pci_modern_device *vdev,
|
||||
struct virtio_pci_region *region, size_t offset);
|
||||
|
||||
u32 vpm_ioread32(struct virtio_pci_modern_device *vdev,
|
||||
struct virtio_pci_region *region, size_t offset);
|
||||
|
||||
/* Virtio 1.0 device manipulation routines */
|
||||
|
||||
#define COMMON_OFFSET(field) offsetof(struct virtio_pci_common_cfg, field)
|
||||
|
||||
static inline void vpm_reset(struct virtio_pci_modern_device *vdev)
|
||||
{
|
||||
vpm_iowrite8(vdev, &vdev->common, 0, COMMON_OFFSET(device_status));
|
||||
while (vpm_ioread8(vdev, &vdev->common, COMMON_OFFSET(device_status)))
|
||||
mdelay(1);
|
||||
}
|
||||
|
||||
static inline u8 vpm_get_status(struct virtio_pci_modern_device *vdev)
|
||||
{
|
||||
return vpm_ioread8(vdev, &vdev->common, COMMON_OFFSET(device_status));
|
||||
}
|
||||
|
||||
static inline void vpm_add_status(struct virtio_pci_modern_device *vdev,
|
||||
u8 status)
|
||||
{
|
||||
u8 curr_status = vpm_ioread8(vdev, &vdev->common, COMMON_OFFSET(device_status));
|
||||
vpm_iowrite8(vdev, &vdev->common,
|
||||
curr_status | status, COMMON_OFFSET(device_status));
|
||||
}
|
||||
|
||||
static inline u64 vpm_get_features(struct virtio_pci_modern_device *vdev)
|
||||
{
|
||||
u32 features_lo, features_hi;
|
||||
|
||||
vpm_iowrite32(vdev, &vdev->common, 0, COMMON_OFFSET(device_feature_select));
|
||||
features_lo = vpm_ioread32(vdev, &vdev->common, COMMON_OFFSET(device_feature));
|
||||
vpm_iowrite32(vdev, &vdev->common, 1, COMMON_OFFSET(device_feature_select));
|
||||
features_hi = vpm_ioread32(vdev, &vdev->common, COMMON_OFFSET(device_feature));
|
||||
|
||||
return ((u64)features_hi << 32) | features_lo;
|
||||
}
|
||||
|
||||
static inline void vpm_set_features(struct virtio_pci_modern_device *vdev,
|
||||
u64 features)
|
||||
{
|
||||
u32 features_lo = (u32)features;
|
||||
u32 features_hi = features >> 32;
|
||||
|
||||
vpm_iowrite32(vdev, &vdev->common, 0, COMMON_OFFSET(guest_feature_select));
|
||||
vpm_iowrite32(vdev, &vdev->common, features_lo, COMMON_OFFSET(guest_feature));
|
||||
vpm_iowrite32(vdev, &vdev->common, 1, COMMON_OFFSET(guest_feature_select));
|
||||
vpm_iowrite32(vdev, &vdev->common, features_hi, COMMON_OFFSET(guest_feature));
|
||||
}
|
||||
|
||||
static inline void vpm_get(struct virtio_pci_modern_device *vdev,
|
||||
unsigned offset, void *buf, unsigned len)
|
||||
{
|
||||
u8 *ptr = buf;
|
||||
unsigned i;
|
||||
|
||||
for (i = 0; i < len; i++)
|
||||
ptr[i] = vpm_ioread8(vdev, &vdev->device, offset + i);
|
||||
}
|
||||
|
||||
static inline u8 vpm_get_isr(struct virtio_pci_modern_device *vdev)
|
||||
{
|
||||
return vpm_ioread8(vdev, &vdev->isr, 0);
|
||||
}
|
||||
|
||||
void vpm_notify(struct virtio_pci_modern_device *vdev,
|
||||
struct vring_virtqueue *vq);
|
||||
|
||||
int vpm_find_vqs(struct virtio_pci_modern_device *vdev,
|
||||
unsigned nvqs, struct vring_virtqueue *vqs);
|
||||
|
||||
int virtio_pci_find_capability(struct pci_device *pci, uint8_t cfg_type);
|
||||
|
||||
int virtio_pci_map_capability(struct pci_device *pci, int cap, size_t minlen,
|
||||
u32 align, u32 start, u32 size,
|
||||
struct virtio_pci_region *region);
|
||||
|
||||
void virtio_pci_unmap_capability(struct virtio_pci_region *region);
|
||||
#endif /* _VIRTIO_PCI_H_ */
|
||||
|
|
|
@ -1,6 +1,8 @@
|
|||
#ifndef _VIRTIO_RING_H_
|
||||
# define _VIRTIO_RING_H_
|
||||
|
||||
#include <ipxe/virtio-pci.h>
|
||||
|
||||
/* Status byte for guest to report progress, and synchronize features. */
|
||||
/* We have seen device and processed generic fields (VIRTIO_CONFIG_F_VIRTIO) */
|
||||
#define VIRTIO_CONFIG_S_ACKNOWLEDGE 1
|
||||
|
@ -79,6 +81,7 @@ struct vring_virtqueue {
|
|||
void *vdata[MAX_QUEUE_NUM];
|
||||
/* PCI */
|
||||
int queue_index;
|
||||
struct virtio_pci_region notification;
|
||||
};
|
||||
|
||||
struct vring_list {
|
||||
|
@ -142,6 +145,7 @@ void *vring_get_buf(struct vring_virtqueue *vq, unsigned int *len);
|
|||
void vring_add_buf(struct vring_virtqueue *vq, struct vring_list list[],
|
||||
unsigned int out, unsigned int in,
|
||||
void *index, int num_added);
|
||||
void vring_kick(unsigned int ioaddr, struct vring_virtqueue *vq, int num_added);
|
||||
void vring_kick(struct virtio_pci_modern_device *vdev, unsigned int ioaddr,
|
||||
struct vring_virtqueue *vq, int num_added);
|
||||
|
||||
#endif /* _VIRTIO_RING_H_ */
|
||||
|
|
Loading…
Reference in New Issue