mirror of https://github.com/ipxe/ipxe.git
[intelxl] Use admin queue to set port MAC address and maximum frame size
Remove knowledge of the PRTGL_SA[HL] registers, and instead use the admin queue to set the MAC address and maximum frame size. Signed-off-by: Michael Brown <mcb30@ipxe.org>pull/697/head^2
Michael Brown
parent
727b034f11
commit
6871a7de70
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@ -535,6 +535,40 @@ static int intelxl_admin_mac_read ( struct net_device *netdev ) {
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return 0;
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}
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/**
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* Set MAC address
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*
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* @v netdev Network device
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* @ret rc Return status code
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*/
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static int intelxl_admin_mac_write ( struct net_device *netdev ) {
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struct intelxl_nic *intelxl = netdev->priv;
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struct intelxl_admin_descriptor *cmd;
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struct intelxl_admin_mac_write_params *write;
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union {
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uint8_t raw[ETH_ALEN];
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struct {
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uint16_t high;
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uint32_t low;
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} __attribute__ (( packed ));
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} mac;
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int rc;
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/* Populate descriptor */
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cmd = intelxl_admin_command_descriptor ( intelxl );
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cmd->opcode = cpu_to_le16 ( INTELXL_ADMIN_MAC_WRITE );
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write = &cmd->params.mac_write;
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memcpy ( mac.raw, netdev->ll_addr, ETH_ALEN );
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write->high = bswap_16 ( mac.high );
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write->low = bswap_32 ( mac.low );
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/* Issue command */
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if ( ( rc = intelxl_admin_command ( intelxl ) ) != 0 )
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return rc;
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return 0;
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}
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/**
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* Clear PXE mode
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*
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@ -686,6 +720,31 @@ static int intelxl_admin_promisc ( struct intelxl_nic *intelxl ) {
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return 0;
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}
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/**
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* Set MAC configuration
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*
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* @v intelxl Intel device
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* @ret rc Return status code
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*/
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static int intelxl_admin_mac_config ( struct intelxl_nic *intelxl ) {
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struct intelxl_admin_descriptor *cmd;
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struct intelxl_admin_mac_config_params *config;
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int rc;
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/* Populate descriptor */
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cmd = intelxl_admin_command_descriptor ( intelxl );
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cmd->opcode = cpu_to_le16 ( INTELXL_ADMIN_MAC_CONFIG );
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config = &cmd->params.mac_config;
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config->mfs = cpu_to_le16 ( intelxl->mfs );
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config->flags = INTELXL_ADMIN_MAC_CONFIG_FL_CRC;
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/* Issue command */
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if ( ( rc = intelxl_admin_command ( intelxl ) ) != 0 )
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return rc;
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return 0;
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}
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/**
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* Restart autonegotiation
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*
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@ -1348,24 +1407,20 @@ void intelxl_empty_rx ( struct intelxl_nic *intelxl ) {
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*/
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static int intelxl_open ( struct net_device *netdev ) {
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struct intelxl_nic *intelxl = netdev->priv;
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union intelxl_receive_address mac;
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unsigned int queue;
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uint32_t prtgl_sal;
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uint32_t prtgl_sah;
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int rc;
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/* Calculate maximum frame size */
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intelxl->mfs = ( ( ETH_HLEN + netdev->mtu + 4 /* CRC */ +
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INTELXL_ALIGN - 1 ) & ~( INTELXL_ALIGN - 1 ) );
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/* Program MAC address and maximum frame size */
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memset ( &mac, 0, sizeof ( mac ) );
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memcpy ( mac.raw, netdev->ll_addr, sizeof ( mac.raw ) );
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prtgl_sal = le32_to_cpu ( mac.reg.low );
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prtgl_sah = ( le32_to_cpu ( mac.reg.high ) |
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INTELXL_PRTGL_SAH_MFS ( intelxl->mfs ) );
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writel ( prtgl_sal, intelxl->regs + INTELXL_PRTGL_SAL );
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writel ( prtgl_sah, intelxl->regs + INTELXL_PRTGL_SAH );
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/* Set MAC address */
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if ( ( rc = intelxl_admin_mac_write ( netdev ) ) != 0 )
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goto err_mac_write;
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/* Set maximum frame size */
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if ( ( rc = intelxl_admin_mac_config ( intelxl ) ) != 0 )
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goto err_mac_config;
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/* Associate transmit queue to PF */
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writel ( ( INTELXL_QXX_CTL_PFVF_Q_PF |
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@ -1408,6 +1463,8 @@ static int intelxl_open ( struct net_device *netdev ) {
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err_create_tx:
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intelxl_destroy_ring ( intelxl, &intelxl->rx );
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err_create_rx:
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err_mac_config:
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err_mac_write:
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return rc;
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}
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@ -171,6 +171,23 @@ struct intelxl_admin_mac_read_buffer {
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uint8_t wol[ETH_ALEN];
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} __attribute__ (( packed ));
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/** Admin queue Manage MAC Address Write command */
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#define INTELXL_ADMIN_MAC_WRITE 0x0108
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/** Admin queue Manage MAC Address Write command parameters */
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struct intelxl_admin_mac_write_params {
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/** Reserved */
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uint8_t reserved_a[1];
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/** Write type */
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uint8_t type;
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/** MAC address first 16 bits, byte-swapped */
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uint16_t high;
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/** MAC address last 32 bits, byte-swapped */
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uint32_t low;
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/** Reserved */
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uint8_t reserved_b[8];
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} __attribute__ (( packed ));
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/** Admin queue Clear PXE Mode command */
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#define INTELXL_ADMIN_CLEAR_PXE 0x0110
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@ -289,6 +306,22 @@ struct intelxl_admin_promisc_params {
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/** Promiscuous VLAN mode */
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#define INTELXL_ADMIN_PROMISC_FL_VLAN 0x0010
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/** Admin queue Set MAC Configuration command */
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#define INTELXL_ADMIN_MAC_CONFIG 0x0603
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/** Admin queue Set MAC Configuration command parameters */
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struct intelxl_admin_mac_config_params {
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/** Maximum frame size */
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uint16_t mfs;
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/** Flags */
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uint8_t flags;
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/** Reserved */
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uint8_t reserved[13];
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} __attribute__ (( packed ));
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/** Append CRC on transmit */
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#define INTELXL_ADMIN_MAC_CONFIG_FL_CRC 0x04
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/** Admin queue Restart Autonegotiation command */
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#define INTELXL_ADMIN_AUTONEG 0x0605
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@ -343,6 +376,8 @@ union intelxl_admin_params {
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struct intelxl_admin_shutdown_params shutdown;
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/** Manage MAC Address Read command parameters */
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struct intelxl_admin_mac_read_params mac_read;
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/** Manage MAC Address Write command parameters */
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struct intelxl_admin_mac_write_params mac_write;
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/** Clear PXE Mode command parameters */
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struct intelxl_admin_clear_pxe_params pxe;
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/** Get Switch Configuration command parameters */
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@ -351,6 +386,8 @@ union intelxl_admin_params {
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struct intelxl_admin_vsi_params vsi;
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/** Set VSI Promiscuous Modes command parameters */
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struct intelxl_admin_promisc_params promisc;
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/** Set MAC Configuration command parameters */
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struct intelxl_admin_mac_config_params mac_config;
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/** Restart Autonegotiation command parameters */
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struct intelxl_admin_autoneg_params autoneg;
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/** Get Link Status command parameters */
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@ -854,22 +891,6 @@ intelxl_init_ring ( struct intelxl_ring *ring, unsigned int count, size_t len,
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#define INTELXL_PFGEN_PORTNUM_PORT_NUM(x) \
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( ( (x) >> 0 ) & 0x3 ) /**< Port number */
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/** Port MAC Address Low Register */
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#define INTELXL_PRTGL_SAL 0x1e2120
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/** Port MAC Address High Register */
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#define INTELXL_PRTGL_SAH 0x1e2140
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#define INTELXL_PRTGL_SAH_MFS(x) ( (x) << 16 ) /**< Max frame size */
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/** Receive address */
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union intelxl_receive_address {
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struct {
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uint32_t low;
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uint32_t high;
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} __attribute__ (( packed )) reg;
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uint8_t raw[ETH_ALEN];
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};
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/** MSI-X interrupt */
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struct intelxl_msix {
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/** PCI capability */
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