mirror of https://github.com/ipxe/ipxe.git
[serial] Add general abstraction of a 16550-compatible UART
Signed-off-by: Michael Brown <mcb30@ipxe.org>pull/38/head
Michael Brown
parent
edf74df4ab
commit
611c9e39da
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/*
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* Copyright (C) 2014 Michael Brown <mbrown@fensystems.co.uk>.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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* 02110-1301, USA.
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*
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* You can also choose to distribute this program under the terms of
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* the Unmodified Binary Distribution Licence (as given in the file
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* COPYING.UBDL), provided that you have satisfied its requirements.
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*/
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FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
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/** @file
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*
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* 16550-compatible UART
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*
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*/
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#include <errno.h>
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#include <ipxe/uart.h>
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/** UART port bases */
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static uint16_t uart_base[] = {
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[COM1] = 0x3f8,
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[COM2] = 0x2f8,
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[COM3] = 0x3e8,
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[COM4] = 0x2e8,
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};
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/**
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* Select UART port
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*
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* @v uart UART
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* @v port Port number, or 0 to disable
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* @ret rc Return status code
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*/
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int uart_select ( struct uart *uart, unsigned int port ) {
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/* Clear UART base */
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uart->base = NULL;
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/* Set new UART base */
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if ( port < ( sizeof ( uart_base ) / sizeof ( uart_base[0] ) ) ) {
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uart->base = ( ( void * ) ( intptr_t ) uart_base[port] );
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return 0;
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} else {
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return -ENODEV;
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}
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}
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@ -48,6 +48,7 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
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#define ERRFILE_timer_bios ( ERRFILE_ARCH | ERRFILE_DRIVER | 0x00010000 )
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#define ERRFILE_hvm ( ERRFILE_ARCH | ERRFILE_DRIVER | 0x00020000 )
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#define ERRFILE_hyperv ( ERRFILE_ARCH | ERRFILE_DRIVER | 0x00030000 )
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#define ERRFILE_x86_uart ( ERRFILE_ARCH | ERRFILE_DRIVER | 0x00040000 )
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#define ERRFILE_cpuid_cmd ( ERRFILE_ARCH | ERRFILE_OTHER | 0x00000000 )
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#define ERRFILE_cpuid_settings ( ERRFILE_ARCH | ERRFILE_OTHER | 0x00010000 )
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#ifndef _BITS_UART_H
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#define _BITS_UART_H
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/** @file
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*
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* 16550-compatible UART
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*
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*/
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FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
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#include <stdint.h>
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#include <ipxe/io.h>
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/**
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* Write to UART register
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*
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* @v uart UART
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* @v addr Register address
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* @v data Data
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*/
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static inline __attribute__ (( always_inline )) void
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uart_write ( struct uart *uart, unsigned int addr, uint8_t data ) {
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outb ( data, ( uart->base + addr ) );
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}
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/**
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* Read from UART register
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*
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* @v uart UART
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* @v addr Register address
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* @ret data Data
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*/
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static inline __attribute__ (( always_inline )) uint8_t
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uart_read ( struct uart *uart, unsigned int addr ) {
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return inb ( uart->base + addr );
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}
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extern int uart_select ( struct uart *uart, unsigned int port );
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#endif /* _BITS_UART_H */
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@ -0,0 +1,135 @@
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/*
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* Copyright (C) 2014 Michael Brown <mbrown@fensystems.co.uk>.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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* 02110-1301, USA.
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*
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* You can also choose to distribute this program under the terms of
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* the Unmodified Binary Distribution Licence (as given in the file
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* COPYING.UBDL), provided that you have satisfied its requirements.
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*/
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FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
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/** @file
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*
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* 16550-compatible UART
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*
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*/
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#include <unistd.h>
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#include <errno.h>
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#include <ipxe/uart.h>
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/** Timeout for transmit holding register to become empty */
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#define UART_THRE_TIMEOUT_MS 100
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/** Timeout for transmitter to become empty */
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#define UART_TEMT_TIMEOUT_MS 1000
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/**
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* Transmit data
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*
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* @v uart UART
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* @v data Data
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*/
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void uart_transmit ( struct uart *uart, uint8_t data ) {
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unsigned int i;
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uint8_t lsr;
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/* Wait for transmitter holding register to become empty */
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for ( i = 0 ; i < UART_THRE_TIMEOUT_MS ; i++ ) {
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lsr = uart_read ( uart, UART_LSR );
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if ( lsr & UART_LSR_THRE )
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break;
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mdelay ( 1 );
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}
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/* Transmit data (even if we timed out) */
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uart_write ( uart, UART_THR, data );
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}
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/**
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* Flush data
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*
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* @v uart UART
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*/
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void uart_flush ( struct uart *uart ) {
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unsigned int i;
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uint8_t lsr;
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/* Wait for transmitter and receiver to become empty */
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for ( i = 0 ; i < UART_TEMT_TIMEOUT_MS ; i++ ) {
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uart_read ( uart, UART_RBR );
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lsr = uart_read ( uart, UART_LSR );
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if ( ( lsr & UART_LSR_TEMT ) && ! ( lsr & UART_LSR_DR ) )
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break;
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}
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}
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/**
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* Initialise UART
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*
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* @v uart UART
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* @v baud Baud rate, or zero to leave unchanged
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* @v lcr Line control register value, or zero to leave unchanged
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* @ret rc Return status code
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*/
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int uart_init ( struct uart *uart, unsigned int baud, uint8_t lcr ) {
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uint8_t dlm;
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uint8_t dll;
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/* Check for existence of UART */
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if ( ! uart->base )
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return -ENODEV;
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uart_write ( uart, UART_SCR, 0x18 );
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if ( uart_read ( uart, UART_SCR ) != 0x18 )
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return -ENODEV;
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uart_write ( uart, UART_SCR, 0xae );
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if ( uart_read ( uart, UART_SCR ) != 0xae )
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return -ENODEV;
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/* Configure divisor and line control register, if applicable */
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if ( ! lcr )
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lcr = uart_read ( uart, UART_LCR );
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uart->lcr = lcr;
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uart_write ( uart, UART_LCR, ( lcr | UART_LCR_DLAB ) );
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if ( baud ) {
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uart->divisor = ( UART_MAX_BAUD / baud );
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dlm = ( ( uart->divisor >> 8 ) & 0xff );
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dll = ( ( uart->divisor >> 0 ) & 0xff );
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uart_write ( uart, UART_DLM, dlm );
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uart_write ( uart, UART_DLL, dll );
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} else {
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dlm = uart_read ( uart, UART_DLM );
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dll = uart_read ( uart, UART_DLL );
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uart->divisor = ( ( dlm << 8 ) | dll );
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}
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uart_write ( uart, UART_LCR, ( lcr & ~UART_LCR_DLAB ) );
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/* Disable interrupts */
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uart_write ( uart, UART_IER, 0 );
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/* Enable FIFOs */
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uart_write ( uart, UART_FCR, UART_FCR_FE );
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/* Assert DTR and RTS */
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uart_write ( uart, UART_MCR, ( UART_MCR_DTR | UART_MCR_RTS ) );
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/* Flush any stale data */
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uart_flush ( uart );
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return 0;
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}
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@ -89,6 +89,7 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
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#define ERRFILE_i2c_bit ( ERRFILE_DRIVER | 0x00120000 )
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#define ERRFILE_spi_bit ( ERRFILE_DRIVER | 0x00130000 )
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#define ERRFILE_nvsvpd ( ERRFILE_DRIVER | 0x00140000 )
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#define ERRFILE_uart ( ERRFILE_DRIVER | 0x00150000 )
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#define ERRFILE_3c509 ( ERRFILE_DRIVER | 0x00200000 )
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#define ERRFILE_bnx2 ( ERRFILE_DRIVER | 0x00210000 )
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@ -0,0 +1,131 @@
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#ifndef _IPXE_UART_H
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#define _IPXE_UART_H
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/** @file
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*
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* 16550-compatible UART
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*
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*/
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FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
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#include <stdint.h>
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/** Transmitter holding register */
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#define UART_THR 0x00
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/** Receiver buffer register */
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#define UART_RBR 0x00
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/** Interrupt enable register */
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#define UART_IER 0x01
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/** FIFO control register */
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#define UART_FCR 0x02
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#define UART_FCR_FE 0x01 /**< FIFO enable */
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/** Line control register */
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#define UART_LCR 0x03
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#define UART_LCR_WLS0 0x01 /**< Word length select bit 0 */
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#define UART_LCR_WLS1 0x02 /**< Word length select bit 1 */
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#define UART_LCR_STB 0x04 /**< Number of stop bits */
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#define UART_LCR_PEN 0x08 /**< Parity enable */
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#define UART_LCR_EPS 0x10 /**< Even parity select */
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#define UART_LCR_DLAB 0x80 /**< Divisor latch access bit */
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#define UART_LCR_WORD_LEN(x) ( ( (x) - 5 ) << 0 ) /**< Word length */
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#define UART_LCR_STOP_BITS(x) ( ( (x) - 1 ) << 2 ) /**< Stop bits */
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#define UART_LCR_PARITY(x) ( ( (x) - 0 ) << 3 ) /**< Parity */
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/**
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* Calculate line control register value
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*
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* @v word_len Word length (5-8)
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* @v parity Parity (0=none, 1=odd, 3=even)
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* @v stop_bits Stop bits (1-2)
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* @ret lcr Line control register value
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*/
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#define UART_LCR_WPS( word_len, parity, stop_bits ) \
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( UART_LCR_WORD_LEN ( (word_len) ) | \
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UART_LCR_PARITY ( (parity) ) | \
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UART_LCR_STOP_BITS ( (stop_bits) ) )
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/** Default LCR value: 8 data bits, no parity, one stop bit */
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#define UART_LCR_8N1 UART_LCR_WPS ( 8, 0, 1 )
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/** Modem control register */
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#define UART_MCR 0x04
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#define UART_MCR_DTR 0x01 /**< Data terminal ready */
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#define UART_MCR_RTS 0x02 /**< Request to send */
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/** Line status register */
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#define UART_LSR 0x05
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#define UART_LSR_DR 0x01 /**< Data ready */
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#define UART_LSR_THRE 0x20 /**< Transmitter holding register empty */
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#define UART_LSR_TEMT 0x40 /**< Transmitter empty */
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/** Scratch register */
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#define UART_SCR 0x07
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/** Divisor latch (least significant byte) */
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#define UART_DLL 0x00
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/** Divisor latch (most significant byte) */
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#define UART_DLM 0x01
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/** Maximum baud rate */
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#define UART_MAX_BAUD 115200
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/** A 16550-compatible UART */
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struct uart {
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/** I/O port base address */
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void *base;
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/** Baud rate divisor */
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uint16_t divisor;
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/** Line control register */
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uint8_t lcr;
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};
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/** Symbolic names for port indexes */
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enum uart_port {
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COM1 = 1,
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COM2 = 2,
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COM3 = 3,
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COM4 = 4,
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};
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#include <bits/uart.h>
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void uart_write ( struct uart *uart, unsigned int addr, uint8_t data );
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uint8_t uart_read ( struct uart *uart, unsigned int addr );
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int uart_select ( struct uart *uart, unsigned int port );
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/**
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* Check if received data is ready
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*
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* @v uart UART
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* @ret ready Data is ready
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*/
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static inline int uart_data_ready ( struct uart *uart ) {
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uint8_t lsr;
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lsr = uart_read ( uart, UART_LSR );
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return ( lsr & UART_LSR_DR );
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}
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/**
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* Receive data
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*
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* @v uart UART
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* @ret data Data
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*/
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static inline uint8_t uart_receive ( struct uart *uart ) {
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return uart_read ( uart, UART_RBR );
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}
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extern void uart_transmit ( struct uart *uart, uint8_t data );
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extern void uart_flush ( struct uart *uart );
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extern int uart_init ( struct uart *uart, unsigned int baud, uint8_t lcr );
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#endif /* _IPXE_UART_H */
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