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[src] Fix spelling in comments, debug messages and local variable names 

Fixes in comments and debug messages:

  existance -> existence
  unecessary -> unnecessary
  occured -> occurred
  decriptor -> descriptor
  neccessary -> necessary
  addres, adress -> address
  initilize -> initialize
  sucessfully -> successfully
  paramter -> parameter
  acess -> access
  upto -> up to
  likelyhood ->likelihood
  thru -> through
  substracting -> subtracting
  lenght -> length
  isnt -> isn't
  interupt -> interrupt
  publically -> publicly (this one was not wrong, but unusual)
  recieve -> receive
  accessable -> accessible
  seperately -> separately
  pacet -> packet
  controled -> controlled
  dectect -> detect
  indicies -> indices
  extremly -> extremely
  boundry -> boundary
  usefull -> useful
  unuseable -> unusable
  auxilliary -> auxiliary
  embeded -> embedded
  enviroment -> environment
  sturcture -> structure
  complier -> compiler
  constructes -> constructs
  supress -> suppress
  intruduced -> introduced
  compatability -> compatibility
  verfication -> verification
  ths -> the
  reponse -> response

Fixes in local variable names:

  retreive -> retrieve

Most of these fixes were made using codespell.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Modified-by: Michael Brown <mcb30@ipxe.org>
Signed-off-by: Michael Brown <mcb30@ipxe.org>
pull/8/head
Stefan Weil 2013-01-03 15:12:32 +00:00 committed by Michael Brown
parent 717279a294
commit 3fcb8cf8dc
31 changed files with 66 additions and 66 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/drivers/net/3c509.h
View File

@ -77,7 +77,7 @@ FILE_LICENCE ( BSD3 );
/**************************************************************************
*
* These define the EEPROM data structure. They are used in the probe
* function to verify the existance of the adapter after having sent
* function to verify the existence of the adapter after having sent
* the ID_Sequence.
*
* There are others but only the ones we use are defined here.

2
src/drivers/net/3c515.c
View File

@ -656,7 +656,7 @@ static int
corkscrew_found_device(int ioaddr, int irq,
int product_index, int options, struct nic *nic)
{
/* Direct copy from Becker 3c515.c with unecessary parts removed */
/* Direct copy from Becker 3c515.c with unnecessary parts removed */
vp->product_name = "3c515";
vp->options = options;
if (options >= 0) {

2
src/drivers/net/3c595.c
View File

@ -127,7 +127,7 @@ static void t595_reset(struct nic *nic)
S_TX_COMPLETE | S_TX_AVAIL, BASE + VX_COMMAND);
/*
* Attempt to get rid of any stray interrupts that occured during
* Attempt to get rid of any stray interrupts that occurred during
* configuration. On the i386 this isn't possible because one may
* already be queued. However, a single stray interrupt is
* unimportant.

2
src/drivers/net/amd8111e.h
View File

@ -574,7 +574,7 @@ typedef enum {
#define CSTATE 1
#define SSTATE 2
/* amd8111e decriptor flag definitions */
/* amd8111e descriptor flag definitions */
typedef enum {
OWN_BIT = (1 << 15),

2
src/drivers/net/cs89x0.c
View File

@ -58,7 +58,7 @@ FILE_LICENCE ( GPL2_ONLY );
Fri Nov 22 23:00:00 1996 Markus Gutschke <gutschk@math.uni-muenster.de>
* read the manuals for the CS89x0 chipsets and took note of all the
changes that will be neccessary in order to adapt Russel Nelson's code
changes that will be necessary in order to adapt Russel Nelson's code
to the requirements of a BOOT-Prom
* 6

8
src/drivers/net/davicom.c
View File

@ -213,11 +213,11 @@ static int phy_read(int location)
phy_write_1bit(io_dcr9, PHY_DATA_1);
phy_write_1bit(io_dcr9, PHY_DATA_0);
/* Send Phy addres */
/* Send Phy address */
for (i=0x10; i>0; i=i>>1)
phy_write_1bit(io_dcr9, phy_addr&i ? PHY_DATA_1: PHY_DATA_0);
/* Send register addres */
/* Send register address */
for (i=0x10; i>0; i=i>>1)
phy_write_1bit(io_dcr9, location&i ? PHY_DATA_1: PHY_DATA_0);
@ -257,11 +257,11 @@ static void phy_write(int location, u16 phy_data)
phy_write_1bit(io_dcr9, PHY_DATA_0);
phy_write_1bit(io_dcr9, PHY_DATA_1);
/* Send Phy addres */
/* Send Phy address */
for (i=0x10; i>0; i=i>>1)
phy_write_1bit(io_dcr9, phy_addr&i ? PHY_DATA_1: PHY_DATA_0);
/* Send register addres */
/* Send register address */
for (i=0x10; i>0; i=i>>1)
phy_write_1bit(io_dcr9, location&i ? PHY_DATA_1: PHY_DATA_0);

20
src/drivers/net/dmfe.c
View File

@ -261,15 +261,15 @@ static void dmfe_reset(struct nic *nic)
db->cr0_data = 0;
db->dm910x_chk_mode = 1; /* Enter the check mode */
}
/* Initilize DM910X board */
/* Initialize DM910X board */
dmfe_init_dm910x(nic);
return;
}
/* Initilize DM910X board
/* Initialize DM910X board
* Reset DM910X board
* Initilize TX/Rx descriptor chain structure
* Initialize TX/Rx descriptor chain structure
* Send the set-up frame
* Enable Tx/Rx machine
*/
@ -307,7 +307,7 @@ static void dmfe_init_dm910x(struct nic *nic)
if (!(db->media_mode & DMFE_AUTO))
db->op_mode = db->media_mode; /* Force Mode */
/* Initiliaze Transmit/Receive decriptor and CR3/4 */
/* Initiliaze Transmit/Receive descriptor and CR3/4 */
dmfe_descriptor_init(nic, ioaddr);
/* tx descriptor start pointer */
@ -572,7 +572,7 @@ static void update_cr6(u32 cr6_data, unsigned long ioaddr)
/*
* Send a setup frame for DM9132
* This setup frame initilize DM910X addres filter mode
* This setup frame initialize DM910X address filter mode
*/
static void dm9132_id_table(struct nic *nic __unused)
@ -623,7 +623,7 @@ static void dm9132_id_table(struct nic *nic __unused)
/*
* Send a setup frame for DM9102/DM9102A
* This setup frame initilize DM910X addres filter mode
* This setup frame initialize DM910X address filter mode
*/
static void send_filter_frame(struct nic *nic)
@ -903,13 +903,13 @@ static void phy_write(unsigned long iobase, u8 phy_addr, u8 offset,
phy_write_1bit(ioaddr, PHY_DATA_0);
phy_write_1bit(ioaddr, PHY_DATA_1);
/* Send Phy addres */
/* Send Phy address */
for (i = 0x10; i > 0; i = i >> 1)
phy_write_1bit(ioaddr,
phy_addr & i ? PHY_DATA_1 :
PHY_DATA_0);
/* Send register addres */
/* Send register address */
for (i = 0x10; i > 0; i = i >> 1)
phy_write_1bit(ioaddr,
offset & i ? PHY_DATA_1 :
@ -959,13 +959,13 @@ static u16 phy_read(unsigned long iobase, u8 phy_addr, u8 offset,
phy_write_1bit(ioaddr, PHY_DATA_1);
phy_write_1bit(ioaddr, PHY_DATA_0);
/* Send Phy addres */
/* Send Phy address */
for (i = 0x10; i > 0; i = i >> 1)
phy_write_1bit(ioaddr,
phy_addr & i ? PHY_DATA_1 :
PHY_DATA_0);
/* Send register addres */
/* Send register address */
for (i = 0x10; i > 0; i = i >> 1)
phy_write_1bit(ioaddr,
offset & i ? PHY_DATA_1 :

2
src/drivers/net/eepro100.c
View File

@ -910,7 +910,7 @@ static void ifec_refill_rx_ring ( struct net_device *netdev )
* Initial allocation & initialization of the rx ring.
*
* @v netdev Device of rx ring.
* @ret rc Non-zero if error occured
* @ret rc Non-zero if error occurred
*/
static int ifec_rx_setup ( struct net_device *netdev )
{

4
src/drivers/net/epic100.c
View File

@ -250,7 +250,7 @@ epic100_open(void)
outl(tmp, txcon);
/* Give adress of RX and TX ring to the chip */
/* Give address of RX and TX ring to the chip */
outl(virt_to_le32desc(&rx_ring), prcdar);
outl(virt_to_le32desc(&tx_ring), ptcdar);
@ -365,7 +365,7 @@ epic100_transmit(struct nic *nic, const char *destaddr, unsigned int type,
* Arguments: none
*
* returns: 1 if a packet was received.
* 0 if no pacet was received.
* 0 if no packet was received.
* side effects:
* returns the packet in the array nic->packet.
* returns the length of the packet in nic->packetlen.

2
src/drivers/net/epic100.h
View File

@ -64,7 +64,7 @@ enum epic100_registers {
#define INTR_RX_STATUS_OK (0x00008000) /* rx status valid. NI */
#define INTR_PCI_TGT_ABT (0x00004000) /* PCI Target abort */
#define INTR_PCI_MASTER_ABT (0x00002000) /* PCI Master abort */
#define INTR_PCI_PARITY_ERR (0x00001000) /* PCI adress parity error */
#define INTR_PCI_PARITY_ERR (0x00001000) /* PCI address parity error */
#define INTR_PCI_DATA_ERR (0x00000800) /* PCI data parity error */
#define INTR_RX_THR_CROSSED (0x00000400) /* rx copy threshold crossed */
#define INTR_CNTFULL (0x00000200) /* Counter overflow */

8
src/drivers/net/etherfabric.c
View File

@ -1566,7 +1566,7 @@ falcon_gmii_wait ( struct efab_nic *efab )
efab_dword_t md_stat;
int count;
/* wait upto 10ms */
/* wait up to 10ms */
for (count = 0; count < 1000; count++) {
falcon_readl ( efab, &md_stat, FCN_MD_STAT_REG_KER );
if ( EFAB_DWORD_FIELD ( md_stat, FCN_MD_BSY ) == 0 ) {
@ -2195,7 +2195,7 @@ falcon_reset_xaui ( struct efab_nic *efab )
falcon_xmac_writel ( efab, &reg, FCN_XX_PWR_RST_REG_MAC );
/* Give some time for the link to establish */
for (count = 0; count < 1000; count++) { /* wait upto 10ms */
for (count = 0; count < 1000; count++) { /* wait up to 10ms */
falcon_xmac_readl ( efab, &reg, FCN_XX_PWR_RST_REG_MAC );
if ( EFAB_DWORD_FIELD ( reg, FCN_XX_RST_XX_EN ) == 0 ) {
falcon_setup_xaui ( efab );
@ -3395,7 +3395,7 @@ falcon_init_sram ( struct efab_nic *efab )
falcon_read ( efab, &reg, FCN_SRM_CFG_REG_KER );
if ( !EFAB_OWORD_FIELD ( reg, FCN_SRAM_OOB_BT_INIT_EN ) )
return 0;
} while (++count < 20); /* wait upto 0.4 sec */
} while (++count < 20); /* wait up to 0.4 sec */
EFAB_ERR ( "timed out waiting for SRAM reset\n");
return -ETIMEDOUT;
@ -3426,7 +3426,7 @@ falcon_setup_nic ( struct efab_nic *efab )
falcon_write ( efab, &reg, FCN_RX_DC_CFG_REG_KER );
/* Set number of RSS CPUs
* bug7244: Increase filter depth to reduce RX_RESET likelyhood
* bug7244: Increase filter depth to reduce RX_RESET likelihood
*/
EFAB_POPULATE_OWORD_5 ( reg,
FCN_NUM_KER, 0,

2
src/drivers/net/forcedeth.c
View File

@ -998,7 +998,7 @@ forcedeth_poll ( struct net_device *netdev )
DBG ( "forcedeth_poll: status = %#04x\n", status );
/* Link change interrupt occured. Call always if link is down,
/* Link change interrupt occurred. Call always if link is down,
* to give auto-neg a chance to finish */
if ( ( status & NVREG_IRQ_LINK ) || ! ( netdev_link_ok ( netdev ) ) )
forcedeth_link_status ( netdev );

2
src/drivers/net/myri10ge.c
View File

@ -719,7 +719,7 @@ static int myri10ge_nv_init ( struct myri10ge_private *priv )
return 0;
}
/* Initilize NonVolatile Storage state. */
/* Initialize NonVolatile Storage state. */
priv->nvs.word_len_log2 = 0;
priv->nvs.size = hdr.eeprom_len;

2
src/drivers/net/p80211hdr.h
View File

@ -258,7 +258,7 @@ typedef union p80211_hdr
/*================================================================*/
/* Function Declarations */
/* Frame and header lenght macros */
/* Frame and header length macros */
#define WLAN_CTL_FRAMELEN(fstype) (\
(fstype) == WLAN_FSTYPE_BLOCKACKREQ ? 24 : \

2
src/drivers/net/pcnet32.c
View File

@ -407,7 +407,7 @@ pcnet32_chip_detect ( struct pcnet32_private *priv )
/*
* On selected chips turn on the BCR18:NOUFLO bit. This stops transmit
* starting until the packet is loaded. Strike one for reliability, lose
* one for latency - although on PCI this isnt a big loss. Older chips
* one for latency - although on PCI this isn't a big loss. Older chips
* have FIFO's smaller than a packet, so you can't do this.
* Turn on BCR18:BurstRdEn and BCR18:BurstWrEn.
*/

4
src/drivers/net/sis190.h
View File

@ -77,7 +77,7 @@ enum sis190_registers {
IntrStatus = 0x20,
IntrMask = 0x24,
IntrControl = 0x28,
IntrTimer = 0x2c, // unused (Interupt Timer)
IntrTimer = 0x2c, // unused (Interrupt Timer)
PMControl = 0x30, // unused (Power Mgmt Control/Status)
rsv2 = 0x34, // reserved
ROMControl = 0x38,
@ -218,7 +218,7 @@ enum _DescStatusBit {
RxSizeMask = 0x0000ffff
/*
* The asic could apparently do vlan, TSO, jumbo (sis191 only) and
* provide two (unused with Linux) Tx queues. No publically
* provide two (unused with Linux) Tx queues. No publicly
* available documentation alas.
*/
};

10
src/drivers/net/sis900.c
View File

@ -328,7 +328,7 @@ static int sis635_get_mac_addr(struct pci_device * pci_dev __unused, struct nic
*
* Side effects:
* leaves the ioaddress of the sis900 chip in the variable ioaddr.
* leaves the sis900 initialized, and ready to recieve packets.
* leaves the sis900 initialized, and ready to receive packets.
*
* Returns: struct nic *: pointer to NIC data structure
*/
@ -394,7 +394,7 @@ static int sis900_probe ( struct nic *nic, struct pci_device *pci ) {
mii_status = sis900_mdio_read(phy_addr, MII_STATUS);
if (mii_status == 0xffff || mii_status == 0x0000)
/* the mii is not accessable, try next one */
/* the mii is not accessible, try next one */
continue;
phy_id0 = sis900_mdio_read(phy_addr, MII_PHY_ID0);
@ -508,7 +508,7 @@ static u16 sis900_read_eeprom(int location)
/*
Read and write the MII management registers using software-generated
serial MDIO protocol. Note that the command bits and data bits are
send out seperately
sent out separately
*/
static void sis900_mdio_idle(long mdio_addr)
@ -1171,8 +1171,8 @@ sis900_transmit(struct nic *nic,
*
* Arguments: struct nic *nic: NIC data structure
*
* Returns: 1 if a packet was recieved.
* 0 if no pacet was recieved.
* Returns: 1 if a packet was received.
* 0 if no packet was received.
*
* Side effects:
* Returns (copies) the packet to the array nic->packet.

8
src/drivers/net/skge.h
View File

@ -1095,7 +1095,7 @@ enum {
PHY_ST_PRE_SUP = 1<<6, /* Bit 6: Preamble Suppression */
PHY_ST_AN_OVER = 1<<5, /* Bit 5: Auto-Negotiation Over */
PHY_ST_REM_FLT = 1<<4, /* Bit 4: Remote Fault Condition Occured */
PHY_ST_REM_FLT = 1<<4, /* Bit 4: Remote Fault Condition Occurred */
PHY_ST_AN_CAP = 1<<3, /* Bit 3: Auto-Negotiation Capability */
PHY_ST_LSYNC = 1<<2, /* Bit 2: Link Synchronized */
PHY_ST_JAB_DET = 1<<1, /* Bit 1: Jabber Detected */
@ -1778,8 +1778,8 @@ enum {
GM_GPSR_LINK_UP = 1<<12, /* Bit 12: Link Up Status */
GM_GPSR_PAUSE = 1<<11, /* Bit 11: Pause State */
GM_GPSR_TX_ACTIVE = 1<<10, /* Bit 10: Tx in Progress */
GM_GPSR_EXC_COL = 1<<9, /* Bit 9: Excessive Collisions Occured */
GM_GPSR_LAT_COL = 1<<8, /* Bit 8: Late Collisions Occured */
GM_GPSR_EXC_COL = 1<<9, /* Bit 9: Excessive Collisions Occurred */
GM_GPSR_LAT_COL = 1<<8, /* Bit 8: Late Collisions Occurred */
GM_GPSR_PHY_ST_CH = 1<<5, /* Bit 5: PHY Status Change */
GM_GPSR_GIG_SPEED = 1<<4, /* Bit 4: Gigabit Speed (1 = 1000 Mbps) */
@ -2284,7 +2284,7 @@ enum {
XM_ST_BC = 1<<7, /* Bit 7: Broadcast packet */
XM_ST_MC = 1<<6, /* Bit 6: Multicast packet */
XM_ST_UC = 1<<5, /* Bit 5: Unicast packet */
XM_ST_TX_UR = 1<<4, /* Bit 4: FIFO Underrun occured */
XM_ST_TX_UR = 1<<4, /* Bit 4: FIFO Underrun occurred */
XM_ST_CS_ERR = 1<<3, /* Bit 3: Carrier Sense Error */
XM_ST_LAT_COL = 1<<2, /* Bit 2: Late Collision Error */
XM_ST_MUL_COL = 1<<1, /* Bit 1: Multiple Collisions */

2
src/drivers/net/sky2.c
View File

@ -783,7 +783,7 @@ static void sky2_mac_init(struct sky2_hw *hw, unsigned port)
sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_CLR);
sky2_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON);
/* On chips without ram buffer, pause is controled by MAC level */
/* On chips without ram buffer, pause is controlled by MAC level */
if (!(hw->flags & SKY2_HW_RAM_BUFFER)) {
sky2_write8(hw, SK_REG(port, RX_GMF_LP_THR), 768/8);
sky2_write8(hw, SK_REG(port, RX_GMF_UP_THR), 1024/8);

6
src/drivers/net/sky2.h
View File

@ -1056,7 +1056,7 @@ enum {
PHY_ST_PRE_SUP = 1<<6, /* Bit 6: Preamble Suppression */
PHY_ST_AN_OVER = 1<<5, /* Bit 5: Auto-Negotiation Over */
PHY_ST_REM_FLT = 1<<4, /* Bit 4: Remote Fault Condition Occured */
PHY_ST_REM_FLT = 1<<4, /* Bit 4: Remote Fault Condition Occurred */
PHY_ST_AN_CAP = 1<<3, /* Bit 3: Auto-Negotiation Capability */
PHY_ST_LSYNC = 1<<2, /* Bit 2: Link Synchronized */
PHY_ST_JAB_DET = 1<<1, /* Bit 1: Jabber Detected */
@ -1587,8 +1587,8 @@ enum {
GM_GPSR_LINK_UP = 1<<12, /* Bit 12: Link Up Status */
GM_GPSR_PAUSE = 1<<11, /* Bit 11: Pause State */
GM_GPSR_TX_ACTIVE = 1<<10, /* Bit 10: Tx in Progress */
GM_GPSR_EXC_COL = 1<<9, /* Bit 9: Excessive Collisions Occured */
GM_GPSR_LAT_COL = 1<<8, /* Bit 8: Late Collisions Occured */
GM_GPSR_EXC_COL = 1<<9, /* Bit 9: Excessive Collisions Occurred */
GM_GPSR_LAT_COL = 1<<8, /* Bit 8: Late Collisions Occurred */
GM_GPSR_PHY_ST_CH = 1<<5, /* Bit 5: PHY Status Change */
GM_GPSR_GIG_SPEED = 1<<4, /* Bit 4: Gigabit Speed (1 = 1000 Mbps) */

4
src/drivers/net/smc9000.h
View File

@ -107,7 +107,7 @@ typedef unsigned long int dword;
#define RPC_LED_10 (0x02) // LED = 10Mbps link detect
#define RPC_LED_FD (0x03) // LED = Full Duplex Mode
#define RPC_LED_TX_RX (0x04) // LED = TX or RX packet occurred
#define RPC_LED_100 (0x05) // LED = 100Mbps link dectect
#define RPC_LED_100 (0x05) // LED = 100Mbps link detect
#define RPC_LED_TX (0x06) // LED = TX packet occurred
#define RPC_LED_RX (0x07) // LED = RX packet occurred
#define RPC_DEFAULT (RPC_ANEG | (RPC_LED_100 << RPC_LSXA_SHFT) | (RPC_LED_FD << RPC_LSXB_SHFT) | RPC_SPEED | RPC_DPLX)
@ -125,7 +125,7 @@ typedef unsigned long int dword;
#define RPC_LED_10 (0x02) // LED = 10Mbps link detect
#define RPC_LED_FD (0x03) // LED = Full Duplex Mode
#define RPC_LED_TX_RX (0x04) // LED = TX or RX packet occurred
#define RPC_LED_100 (0x05) // LED = 100Mbps link dectect
#define RPC_LED_100 (0x05) // LED = 100Mbps link detect
#define RPC_LED_TX (0x06) // LED = TX packet occurred
#define RPC_LED_RX (0x07) // LED = RX packet occurred
#define RPC_DEFAULT (RPC_ANEG | (RPC_LED_100 << RPC_LSXA_SHFT) | (RPC_LED_FD << RPC_LSXB_SHFT) | RPC_SPEED | RPC_DPLX)

6
src/drivers/net/sundance.c
View File

@ -258,7 +258,7 @@ static struct sundance_private {
const char *nic_name;
/* Frequently used values */
unsigned int cur_rx; /* Producer/consumer ring indicies */
unsigned int cur_rx; /* Producer/consumer ring indices */
unsigned int mtu;
/* These values keep track of the tranceiver/media in use */
@ -441,7 +441,7 @@ static void sundance_irq ( struct nic *nic, irq_action_t action ) {
/**************************************************************************
POLL - Wait for a frame
***************************************************************************/
static int sundance_poll(struct nic *nic, int retreive)
static int sundance_poll(struct nic *nic, int retrieve)
{
/* return true if there's an ethernet packet ready to read */
/* nic->packet should contain data on return */
@ -455,7 +455,7 @@ static int sundance_poll(struct nic *nic, int retreive)
return 0;
/* There is a packet ready */
if(!retreive)
if(!retrieve)
return 1;
intr_status = inw(nic->ioaddr + IntrStatus);

6
src/drivers/net/tlan.c
View File

@ -202,7 +202,7 @@ static struct tlan_private {
unsigned short vendor_id; /* PCI Vendor code */
unsigned short dev_id; /* PCI Device code */
const char *nic_name;
unsigned int cur_rx, dirty_rx; /* Producer/consumer ring indicies */
unsigned int cur_rx, dirty_rx; /* Producer/consumer ring indices */
unsigned rx_buf_sz; /* Based on mtu + Slack */
struct TLanList *txList;
u32 txHead;
@ -1085,11 +1085,11 @@ These routines are based on the information in Chap. 2 of the
* for this device.
* phy The address of the PHY to be queried.
* reg The register whose contents are to be
* retreived.
* retrieved.
* val A pointer to a variable to store the
* retrieved value.
*
* This function uses the TLAN's MII bus to retreive the contents
* This function uses the TLAN's MII bus to retrieve the contents
* of a given register on a PHY. It sends the appropriate info
* and then reads the 16-bit register value from the MII bus via
* the TLAN SIO register.

10
src/drivers/net/via-rhine.c
View File

@ -288,7 +288,7 @@ static const char *version = "rhine.c v1.0.2 2004-10-29\n";
*/
#define EECSR_EEPR 0x80 /* eeprom programed status, 73h means programed */
#define EECSR_EMBP 0x40 /* eeprom embeded programming */
#define EECSR_EMBP 0x40 /* eeprom embedded programming */
#define EECSR_AUTOLD 0x20 /* eeprom content reload */
#define EECSR_DPM 0x10 /* eeprom direct programming */
#define EECSR_CS 0x08 /* eeprom CS pin */
@ -322,7 +322,7 @@ static const char *version = "rhine.c v1.0.2 2004-10-29\n";
* Bits in the CFGA register
*/
#define CFGA_EELOAD 0x80 /* enable eeprom embeded and direct programming */
#define CFGA_EELOAD 0x80 /* enable eeprom embedded and direct programming */
#define CFGA_JUMPER 0x40
#define CFGA_MTGPIO 0x08
#define CFGA_T10EN 0x02
@ -693,7 +693,7 @@ static void MIIDelay (void);
static void rhine_init_ring (struct nic *dev);
static void rhine_disable (struct nic *nic);
static void rhine_reset (struct nic *nic);
static int rhine_poll (struct nic *nic, int retreive);
static int rhine_poll (struct nic *nic, int retrieve);
static void rhine_transmit (struct nic *nic, const char *d, unsigned int t,
unsigned int s, const char *p);
static void reload_eeprom(int ioaddr);
@ -1286,7 +1286,7 @@ rhine_reset (struct nic *nic)
#define IOSYNC do { inb(nic->ioaddr + StationAddr); } while (0)
static int
rhine_poll (struct nic *nic, int retreive)
rhine_poll (struct nic *nic, int retrieve)
{
struct rhine_private *tp = (struct rhine_private *) nic->priv_data;
int rxstatus, good = 0;;
@ -1295,7 +1295,7 @@ rhine_poll (struct nic *nic, int retreive)
{
unsigned int intr_status;
/* There is a packet ready */
if(!retreive)
if(!retrieve)
return 1;
intr_status = inw(nic->ioaddr + IntrStatus);

2
src/drivers/net/via-velocity.c
View File

@ -125,7 +125,7 @@ VELOCITY_PARAM(enable_tagging, "Enable 802.1Q tagging");
/* IP_byte_align[] is used for IP header DWORD byte aligned
0: indicate the IP header won't be DWORD byte aligned.(Default) .
1: indicate the IP header will be DWORD byte aligned.
In some enviroment, the IP header should be DWORD byte aligned,
In some environment, the IP header should be DWORD byte aligned,
or the packet will be droped when we receive it. (eg: IPVS)
*/
VELOCITY_PARAM(IP_byte_align, "Enable IP header dword aligned");

2
src/drivers/net/via-velocity.h
View File

@ -878,7 +878,7 @@ enum {
* Bits in the EECSR register
*/
#define EECSR_EMBP 0x40 /* eeprom embeded programming */
#define EECSR_EMBP 0x40 /* eeprom embedded programming */
#define EECSR_RELOAD 0x20 /* eeprom content reload */
#define EECSR_DPM 0x10 /* eeprom direct programming */
#define EECSR_ECS 0x08 /* eeprom CS pin */

2
src/drivers/net/virtio-net.c
View File

@ -69,7 +69,7 @@ FILE_LICENCE ( GPL2_OR_LATER );
* Linux source.
*/
/* Virtqueue indicies */
/* Virtqueue indices */
enum {
RX_INDEX = 0,
TX_INDEX,

2
src/drivers/net/vxge/vxge_main.c
View File

@ -252,7 +252,7 @@ static void vxge_poll(struct net_device *ndev)
/*
* vxge_irq - enable or Disable interrupts
*
* @netdev netdevice sturcture reference
* @netdev netdevice structure reference
* @action requested interrupt action
*/
static void vxge_irq(struct net_device *netdev __unused, int action)

2
src/include/ipxe/iscsi.h
View File

@ -36,7 +36,7 @@ union iscsi_segment_lengths {
*/
uint8_t data_len[3];
} bytes;
/** Ths data length (measured in bytes), in network byte
/** The data length (measured in bytes), in network byte
* order, with ahs_len as the first byte.
*/
uint32_t ahs_and_data_len;

2
src/include/ipxe/pci.h
View File

@ -172,7 +172,7 @@ FILE_LICENCE ( GPL2_ONLY );
#define PCI_PM_CAP_PME_CLOCK 0x0008 /* PME clock required */
#define PCI_PM_CAP_RESERVED 0x0010 /* Reserved field */
#define PCI_PM_CAP_DSI 0x0020 /* Device specific initialization */
#define PCI_PM_CAP_AUX_POWER 0x01C0 /* Auxilliary power support mask */
#define PCI_PM_CAP_AUX_POWER 0x01C0 /* Auxiliary power support mask */
#define PCI_PM_CAP_D1 0x0200 /* D1 power state support */
#define PCI_PM_CAP_D2 0x0400 /* D2 power state support */
#define PCI_PM_CAP_PME 0x0800 /* PME pin supported */

2
src/net/udp/dns.c
View File

@ -428,7 +428,7 @@ static int dns_xfer_deliver ( struct dns_request *dns,
}
/* Determine what to do next based on the type of query we
* issued and the reponse we received
* issued and the response we received
*/
switch ( qtype ) {